Honeywell International Inc. ALA-52B3 사용자 설명서
a 0 to 40 decibels voltage controlled amplifier. Its gain goes from 0 to 40 decibels gain when
the input on pin 9 goes from 1.25 to 2.5 volts. Overall, from pin 2 of U502-A to pin 11 of
U502-B, there is up to 80 decibels gain available depends up on the IF_AGC control signal.
The output is low-pass filtered through R503 and C503 and goes into the first of two switched
capacitor filters.
the input on pin 9 goes from 1.25 to 2.5 volts. Overall, from pin 2 of U502-A to pin 11 of
U502-B, there is up to 80 decibels gain available depends up on the IF_AGC control signal.
The output is low-pass filtered through R503 and C503 and goes into the first of two switched
capacitor filters.
f. Components U500 and U501 are switched capacitor elliptical filters which have a response
equivalent to an eight-pole elliptical filter. The cutoff is determined by the FILTER_CLK which
comes from the DSP section. The cutoff is at 43 KHz. The output of these filters have an
uncommitted op-amp with which resistors R1, R2, R3, and capacitors C1 and C2, are a dual,
two-pole low-pass filter to reduce the amount of clock noise on the output. The output of U500
is connected to U501, which is essentially the same circuit, to give it a very sharp cut-off to
prevent high frequencies going to the DSP. The output at pin 5 of U501 goes through high-
pass filter C507 to pin 3 of amplifier U503 which has a gain of 15 decibels. The output of U503
goes through R22 and is the BASEBAND_OUT which goes to the DSP section.
comes from the DSP section. The cutoff is at 43 KHz. The output of these filters have an
uncommitted op-amp with which resistors R1, R2, R3, and capacitors C1 and C2, are a dual,
two-pole low-pass filter to reduce the amount of clock noise on the output. The output of U500
is connected to U501, which is essentially the same circuit, to give it a very sharp cut-off to
prevent high frequencies going to the DSP. The output at pin 5 of U501 goes through high-
pass filter C507 to pin 3 of amplifier U503 which has a gain of 15 decibels. The output of U503
goes through R22 and is the BASEBAND_OUT which goes to the DSP section.
5. BITE MUX
a. The BITE MUX U4 is a CMOS latched 16-bit to 1 analog multiplexer. The BITE MUX has
different voltages on its inputs which are monitored by the DSP section. On input 1 (S1) and
2 (S2), 2.5V and 3.3 volts going to the RF section are monitored. Also, input 2 (S2) provides
FAULT_EB signal which can be decoded to a set of RF circuitry failures. Inputs 3 (S3) thru 4
(S8) are the RX_SWT_CNTRL signal voltage which is monitored. Input 7 (S7) is the
FAULT_EF signal voltage which is monitored. Input 7 (S6) is the CAL_SWT_CNTRL signal
voltage, which is monitored. Input 8 (S8) is the RF_AGC signal voltage which is monitored.
Input 9 (S9) is the +12_DIG volts which is monitored. Input 10 (S10) is the +5V_RF which is
monitored. Input 11 (S11) is the -12_DIG volts which is monitored. Input 12 (S12) is the -
5_DIG volts which is monitored. Input 13 (S13) is the TX_ANT_MON which is monitored and
should look like a short when connected to an antenna. Input 14 (S14) is the RX_ANT_MON
which is monitored and should look like a short if its connected. Input 15 (S15) is the
RAMP_OFFSET signal voltage which is monitored. Input 16 (S16) is the TX_POWER_MON
which is monitored. U508-A is a buffer amplifier to buffer the output going to the DSP section.
2 (S2), 2.5V and 3.3 volts going to the RF section are monitored. Also, input 2 (S2) provides
FAULT_EB signal which can be decoded to a set of RF circuitry failures. Inputs 3 (S3) thru 4
(S8) are the RX_SWT_CNTRL signal voltage which is monitored. Input 7 (S7) is the
FAULT_EF signal voltage which is monitored. Input 7 (S6) is the CAL_SWT_CNTRL signal
voltage, which is monitored. Input 8 (S8) is the RF_AGC signal voltage which is monitored.
Input 9 (S9) is the +12_DIG volts which is monitored. Input 10 (S10) is the +5V_RF which is
monitored. Input 11 (S11) is the -12_DIG volts which is monitored. Input 12 (S12) is the -
5_DIG volts which is monitored. Input 13 (S13) is the TX_ANT_MON which is monitored and
should look like a short when connected to an antenna. Input 14 (S14) is the RX_ANT_MON
which is monitored and should look like a short if its connected. Input 15 (S15) is the
RAMP_OFFSET signal voltage which is monitored. Input 16 (S16) is the TX_POWER_MON
which is monitored. U508-A is a buffer amplifier to buffer the output going to the DSP section.
6. Power Supply Filtering
(a) The power supply filtering consists of L507, L501, L505, and L504. RF CCA contains
voltage regulators U13, U16, U22, U23, U29, U30, U34, U509 and U515 linear
regulators to generate a clean +1.8V, +2.5V, +3.3V, +5.0V, +10V, and -5V for various
RF and digital ICs. Component U5 is switching regulator to convert 12V to +6V DC with
85 percent efficiency. This device contains internal short circuit protection also.
regulators to generate a clean +1.8V, +2.5V, +3.3V, +5.0V, +10V, and -5V for various
RF and digital ICs. Component U5 is switching regulator to convert 12V to +6V DC with
85 percent efficiency. This device contains internal short circuit protection also.
NOTE: The schematics for the new RF Module described above can be found in attached
“AOIALA-52B3 RF Module Schematics”. This is only change from previously test and
approved AOIALA-52B unit.
approved AOIALA-52B unit.
NOTE: The alignment procedure for the new RF Module described above can be found in
attached
“AOIALA-52B3 RF Module Alignment Procedures”.
NOTE: The Acceptance Test Procedure (ATP) for the new -0432 and -0531 units can be found
in attached
“AOIALA-52B3 Acceptance Test Procedures”