Intel III Xeon 500 MHz 80525KX500512 사용자 설명서

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80525KX500512
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Pentium
® 
III Xeon™ Processor at 500 and 550 MHz
32
Datasheet
3.0
Signal Quality
Signals driven on the Pentium 
III
 Xeon processor system bus should meet signal quality 
specifications to ensure that the components read data properly and to ensure that incoming signals 
do not affect the long term reliability of the component. Specifications are provided for simulation 
at the processor core. Meeting the specifications at the processor core in 
ensures that signal quality effects will not adversely affect processor operation.
Figure 11. Test Timings (Boundary Scan)
Figure 12. Test Reset Timings
TCK
TDI, TMS
Input
Signals
TDO
Output
Signals
1.25V
T
v
T
w
T
r
T
s
T
x
T
u
T
y
T
z
1.25V
T
r
T43 (All Non-Test Inputs Setup Time)
=
T
s
T44 (All Non-Test Inputs Hold Time)
=
T
u
T40 (TDO Float Delay)
=
T
v
T37 (TDI, TMS Setup Time)
=
T
w
T38 (TDI, TMS Hold Time)
=
T
x
T39 (TDO Valid Delay)
=
T
y
T41 (All Non-Test Outputs Valid Delay)
=
T
z
T42 (All Non-Test Outputs Float Delay)
=
Non-Test
Non-Test
TRST#
1.25V
T
q
T
q
T36 (TRST# Pulse Width)
=