Intel III Xeon 733 MHz 80526KZ733256 사용자 설명서

Intel

제품 코드

80526KZ733256

TABLE OF CONTENTS

2

TABLE OF CONTENTS

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1. INTRODUCTION ......................................................................................................................... 6

2. TERMINOLOGY .......................................................................................................................... 7

2.1 S.E.C. CARTRIDGE TERMINOLOGY.................................................................................... 7

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3. ELECTRICAL SPECIFICATIONS ............................................................................................... 9

VREF................................................................................................... 9

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3.3.1 VCC_CORE ................................................................................................................... 11

LEVEL 2 CACHE DECOUPLING............................................................................. 11

SYSTEM BUS AGTL+ DECOUPLING..................................................................... 11

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MIXING PROCESSORS OF DIFFERENT FREQUENCIES ................................... 13

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ASYNCHRONOUS VS. SYNCHRONOUS FOR SYSTEM BUS SIGNALS ............ 17

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4. SIGNAL QUALITY..................................................................................................................... 33

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4.2.2 AGTL+ Signal Quality Specifications .............................................................................. 34

AGTL+ OVERSHOOT/UNDERSHOOT GUIDELINES ............................................ 34

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4.3.1 2.5V Signal Overshoot/Undershoot Guidelines ............................................................. 38

4.3.2 BCLK Overshoot/Undershoot Guidelines and Specifications ........................................ 39

4.3.3 Measuring BCLK Overshoot/Undershoot........................................................................ 39

4.3.4 2.5V TOLERANT BUFFER RINGBACK SPECIFICATION ............................................ 40

4.3.5 2.5V TOLERANT BUFFER SETTLING LIMIT GUIDELINE............................................ 40

5. PROCESSOR FEATURES........................................................................................................ 41

............................................................................. 41

NORMAL STATE — STATE 1 ................................................................................. 41

AUTO HALT POWER DOWN STATE — STATE 2 ................................................. 41