Crucial Micron P300 200GB SATA MTFDDAC200SAL-1N1AA 사용자 설명서
제품 코드
MTFDDAC200SAL-1N1AA
Table 6: IDENTIFY Device ID (Continued)
• F = The content of the word is fixed and does not change
• V = The content of the word is variable and may change depending on the state of the device or the commands execu-
• V = The content of the word is variable and may change depending on the state of the device or the commands execu-
ted by the device
• X = The fixed or variable type of this field is not defined in the governing standard
• R = The content of the word is reserved and shall be zero
• R = The content of the word is reserved and shall be zero
Word
Bit(s)
Setting
Default Value
Description
59
15
F
1b
1 = The BLOCK ERASE EXT command is supported
14
F
0b
1 = The OVERWRITE EXT command is supported
13
F
0b
1 = The CRYPTO SCRAMBLE EXT command is supported
12
F
1b
1 = The sanitize feature set is supported
11–9
000b
Reserved
8
V
1b
1 = Multiple sector setting is valid
7–0
V
00000001b
Current setting for number of logical sectors that shall be
transferred per DRQ data block on READ/WRITE MULTIPLE
commands
transferred per DRQ data block on READ/WRITE MULTIPLE
commands
60
F
Sect
Total number of user addressable logical sectors for 28-bit
commands
commands
62
X
0000h
Obsolete
63
15–11
00000b
Reserved
10
V
0b
1 = Multiword DMA mode 2 is selected
0 = Multiword DMA mode 2 is not selected
0 = Multiword DMA mode 2 is not selected
9
V
0b
1 = Multiword DMA mode 1 is selected
0 = Multiword DMA mode 1 is not selected
0 = Multiword DMA mode 1 is not selected
8
V
0b
1 = Multiword DMA mode 0 is selected
0 = Multiword DMA mode 0 is not selected
0 = Multiword DMA mode 0 is not selected
7–3
0000b
Reserved
2
F
1b
1 = Multiword DMA mode 2 and below is supported
1
F
1b
1 = Multiword DMA mode 1 and below is supported
0
F
1b
1 = Multiword DMA mode 0 is supported
64
15–8
00
Reserved
7–0
F
03h
PIO modes support
65
F
0078h
Minimum multiword DMA transfer cycle time per word in
nanoseconds (cycle time)
nanoseconds (cycle time)
66
F
0078h
MFR's recommended multiword DMA transfer cycle time
per word in nanoseconds (cycle time)
per word in nanoseconds (cycle time)
67
F
0078h
Minimum PIO transfer cycle time without flow control in
nanoseconds (cycle time)
nanoseconds (cycle time)
68
15–0
F
0078h
Minimum PIO transfer cycle time with IORDY flow control in
nanoseconds (cycle time)
nanoseconds (cycle time)
P300 2.5-Inch NAND Flash SSD
Device ID
PDF: 09005aef840793dc
p300_2_5.pdf - Rev. K 5/12 EN
p300_2_5.pdf - Rev. K 5/12 EN
9
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