Intel SC5400BRP 사용자 설명서
Hot Swap Hard Disk Drive Bays
Intel® Server Chassis SC5400 5U Kit TPS
58
Revision:
1.0
6.1.7 Clock
Generation and Distribution
The 4HDD and 6HDD SAS/SATA HSBP provides one clock source. A 4-MHz crystal provides
clock to the VSC410* controller.
clock to the VSC410* controller.
6.1.8
7-Pin SAS/SATA Host Connectors
The 4HDD and 6HDD passive SAS/SATA HSBP provides four or six 7-pin SAS/SATA
connectors that will be connected to the host interface of the server board or HBA via mated
cable.
connectors that will be connected to the host interface of the server board or HBA via mated
cable.
The following table defines the pin-out of the 7-pin SAS/SATA host connector.
Table 46. 7-pin SAS/SATA Connector Pin-out
Connector Contact Number
Signal Name
S1 GND
S2 SATA_DRVnA_RX_P
S3 SATA_DRVnA_RX_N
S4 GND
S5 SATA_DRVnA_TX_N
S6 SATA_DRVnA_TX_P
S7 GND
Note:
n=0, 1, 2, 3, 4, 5.
6.1.9
IPMB Header - IPMB
The following table defines the pin-out of the 4-pin IPMB Header. This connector is white in
color.
color.
Table 47. IPMB Header Pin-out
Pin
Signal Name
Description
1 SMB_5VSTB_IPMB_DAT
Data
2 GND
GND
3 SMB_5VSTB_
IPMB_CLK
Clock
4
SMB_5VSTB_ IPMB_ADDR
IPMI interface address selection. Primary
(Low)= 0xC0, Secondary(High) = 0xC2
(Low)= 0xC0, Secondary(High) = 0xC2