Fujifilm Xeon 5060 S26361-F3312-L320 데이터 시트
제품 코드
S26361-F3312-L320
Thermal Specifications
88
Dual-Core Intel
®
Xeon
®
Processor 5100 Series Datasheet
6.3.1.2
Processor Thermal Data Sample Rate and Filtering
The DTS provides an improved capability to monitor device hot spots, which inherently
leads to more varying temperature readings over short time intervals. The DTS sample
interval range can be modified, and a data filtering algorithm can be activated to help
moderate this. The DTS sample interval range is 82 µs (default) to 20 ms (max). This
value can be set in BIOS.
leads to more varying temperature readings over short time intervals. The DTS sample
interval range can be modified, and a data filtering algorithm can be activated to help
moderate this. The DTS sample interval range is 82 µs (default) to 20 ms (max). This
value can be set in BIOS.
To reduce the sample rate requirements on PECI and improve thermal data stability vs.
time the processor DTS also implements an averaging algorithm that filters the
incoming data. This is an alpha-beta filter with coefficients of 0.5, and is expressed
mathematically as: Current_filtered_temp = (Previous_filtered_temp / 2) +
(new_sensor_temp / 2). This filtering algorithm is fixed and cannot be changed. It is
on by default and can be turned off in BIOS.
time the processor DTS also implements an averaging algorithm that filters the
incoming data. This is an alpha-beta filter with coefficients of 0.5, and is expressed
mathematically as: Current_filtered_temp = (Previous_filtered_temp / 2) +
(new_sensor_temp / 2). This filtering algorithm is fixed and cannot be changed. It is
on by default and can be turned off in BIOS.
Host controllers should utilize the min/max sample times to determine the appropriate
sample rate based on the controller's fan control algorithm and targeted response rate.
The key items to take into account when settling on a fan control algorithm are the DTS
sample rate, whether the temperature filter is enabled, how often the PECI host will
poll the processor for temperature data, and the rate at which fan speed is changed.
Depending on the designer’s specific requirements the DTS sample rate and alpha-beta
filter may have no effect on the fan control algorithm.
sample rate based on the controller's fan control algorithm and targeted response rate.
The key items to take into account when settling on a fan control algorithm are the DTS
sample rate, whether the temperature filter is enabled, how often the PECI host will
poll the processor for temperature data, and the rate at which fan speed is changed.
Depending on the designer’s specific requirements the DTS sample rate and alpha-beta
filter may have no effect on the fan control algorithm.
6.3.2
PECI Specifications
6.3.2.1
PECI Device Address
The socket 0 PECI register resides at address 0x30 and socket 1 resides at 0x31.
6.3.2.2
PECI Command Support
The Dual-Core Intel
®
Xeon
®
Processor 5100 Series supports the PECI commands listed
in
:
Figure 6-8. Temperature Data Format Comparison: Thermal Diode vs. PECI Digital
Thermal Sensor
Fan Speed
(RPM)
(RPM)
Conceptual Fan Control Diagram on Desktop Platforms
(not intended to depict actual implementation)
(not intended to depict actual implementation)
Tdiode = 80C
Max
Min
Temperature
PECI = -10C
Tdiode = 70C
PECI = -20C
TCC Activation
Temperature
TControl
Setting
PECI = 0C