Intel Quad-core Intel Xeon DP X5335 Active BX80563X5335A 데이터 시트
제품 코드
BX80563X5335A
Quad-Core Intel® Xeon® Processor 5300 Series Datasheet
45
Electrical Specifications
7.
Ringback Margin is defined as the absolute voltage difference between the maximum Rising Edge Ringback
and the maximum Falling Edge Ringback.
8.
Threshold Region is defined as a region entered around the crossing point voltage in which the differential
receiver switches. It includes input threshold hysteresis.
9.
The crossing point must meet the absolute and relative crossing point specifications simultaneously.
10. V
Havg
can be measured directly using “Vtop” on Agilent and “High” on Tektronix oscilloscopes.
11. For V
IN
between 0 V and V
H
.
12. ΔV
CROSS
is defined as the total variation of all crossing voltages as defined in Note 3.
Figure 2-13. Electrical Test Circuit
Figure 2-14. TCK Clock Waveform
V2
V1
Tp
TCK
T
p
= T55: Period
V1, V2: For rise and fall times, TCK is measured between 20% and 80% points on the waveform.
V3: TCK is referenced to 0.5 * V
V3: TCK is referenced to 0.5 * V
TT
V3