Texas Instruments LM3448 Evaluation Board LM3448-EDSNEV/NOPB LM3448-EDSNEV/NOPB 데이터 시트
제품 코드
LM3448-EDSNEV/NOPB
A C -R M S -P K
V
2
s in ( )
u
T
A C - R M S - P K
V
2
dv
i
C
dt
V
BUCK
8.33 ms
30°
t
X
t
150°
180°
0°
SNOSB51C – SEPTEMBER 2011 – REVISED MAY 2013
Figure 36. Two Stage Valley-Fill V
BUCK
Voltage with no TRIAC Dimming
From
and the equation for current in a capacitor,
(30)
the amount of capacitance needed at V
BUCK
can be calculated using the following method.
At 60Hz and a valley-fill circuit of two stages, the hold-up time (t
X
) required at V
BUCK
is calculated as follows. The
total angle of an AC half cycle is 180° and the total time of a half AC line cycle is 8.33ms. When the angle of the
AC waveform is at 30° and 150°, the voltage of the AC line is exactly ½ of its peak. With a two stage valley-fill
circuit, this is the point where the LED string switches from power being derived from AC line to power being
derived from the hold-up capacitors (C7 and C9). At 60° out of 180° of the cycle or 1/3 of the cycle, the power is
derived from the hold-up capacitors (1/3 x 8.33 ms = 2.78 ms). This is equal to the hold-up time (dt) from the
above equation, and dv is the amount of voltage the circuit is allowed to droop. From the next section
(“Determining Maximum Number of Series Connected LEDs Allowed”) we know the minimum V
AC waveform is at 30° and 150°, the voltage of the AC line is exactly ½ of its peak. With a two stage valley-fill
circuit, this is the point where the LED string switches from power being derived from AC line to power being
derived from the hold-up capacitors (C7 and C9). At 60° out of 180° of the cycle or 1/3 of the cycle, the power is
derived from the hold-up capacitors (1/3 x 8.33 ms = 2.78 ms). This is equal to the hold-up time (dt) from the
above equation, and dv is the amount of voltage the circuit is allowed to droop. From the next section
(“Determining Maximum Number of Series Connected LEDs Allowed”) we know the minimum V
BUCK
voltage will
be about 45V for a 90VAC to 135VAC line. At a 90VAC low line operating condition input, ½ of the peak voltage
is 64V. Therefore with some margin the voltage at V
is 64V. Therefore with some margin the voltage at V
BUCK
cannot droop more than about 15V (dv). (i) is equal to
(P
OUT
/ V
BUCK
), where P
OUT
is equal to (V
LED
x I
LED
). Total capacitance (C7 in parallel with C9) can now be
calculated. See “ Design Example" section for further calculations of the valley-fill capacitors.
MAXIMUM NUMBER OF SERIES CONNECTED LEDS
A buck converter topology requires that the input voltage (V
BUCK
) of the output circuit must be greater than the
voltage of the LED stack (V
LED
) for proper regulation. One must determine what the minimum voltage observed
by the buck converter will be before the maximum number of series LEDs allowed can be determined. Two
variables will have to be determined in order to accomplish this.
variables will have to be determined in order to accomplish this.
1. AC line operating voltage. This is usually 90VAC to 135VAC for North America. Although the LM3448 can
operate at much lower and higher input voltages a range is needed to illustrate the design process.
2. Number of stages being implemented in the valley-fill circuit.
In this example a two-stage valley-fill circuit will be used.
shows three TRIAC dimmed waveforms. One can easily see that the peak voltage (V
PEAK
) from 0° to
90° will always be,
(31)
Once the TRIAC is firing at an angle greater than 90° the peak voltage will lower and be equal to,
(32)
28
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