Texas Instruments CDC3S04EVM - CDC3S04EVM Evaluation Module CDC3S04EVM CDC3S04EVM 데이터 시트
제품 코드
CDC3S04EVM
DVcc
A
Vcc
T
est/SBWTCK
TDO
TDI
TMS
TCK
RST/NMI/SBWTDIO
VBUS_4v3
VBUS_4v3
1.8V_Vdd_MSP
1.8V_Vdd_MSP
1.8V_Vdd_MSP
1.8V_Vdd_MSP
1.8V_Vdd_MSP
VBUS_4v3
ADC_0
ADC_1
MCLK_REQ
REQ1
REQ4
REQ3
REQ2
MSP_EN_Adj
RESET
SDAH
SCLH
I2C
USBConnection
withESDprotection
measurementfor
Vdd_ANA&Vadj
DNP
C7
470n
C7
470n
C74
220nF
C74
220nF
SW2
SWPUSHBUTT
ON
SW2
SWPUSHBUTT
ON
C45
15PF
C45
15PF
D1
LL103A
D1
LL103A
R6
5.6K
R6
5.6K
C78
4u7
C78
4u7
R121
22R
R121
22R
C9
15PF
C9
15PF
C47
10PF
C47
10PF
C16
100nF
C16
100nF
C13
10nF
C13
10nF
R1
33
R1
33
C4
100nF
C4
100nF
R5
5.6K
R5
5.6K
R122
22R
R122
22R
J7J7
1
2
R8
100K
R8
100K
R2
33
R2
33
C10
2.2nFDNP
C10
2.2nFDNP
C1
10PF
C1
10PF
C5
100nF
C5
100nF
C2
10PF
C2
10PF
C12
10nF
C12
10nF
U3
MSP430F5529
U3
MSP430F5529
P5.0/VREF+/V
eREF+
9
P5.1/VREF-/V
eREF-
10
A
Vcc1
1
1
P5.4/XIN
12
P5.5/XOUT
13
A
Vss1
14
DVcc1
18
DVss1
19
Vcore
20
P2
.7
/U
CB
0S
TE
/U
CA
0C
LK
36
DVss2
49
DVcc2
50
P3
.0
/U
CB
0S
IM
O/U
CB
0S
DA
37
P3
.1
/U
CB
0S
OM
I/U
CB
0S
CL
38
P3
.2
/U
CB
0C
LK
/U
CA
0S
TE
39
P3
.3
/U
CA
0T
XD
/U
CA
0S
IM
O
40
P3.4/UCA0RXD/UCA0SOMI
41
P4.0/PM_UCB1STE/PM_UCA1CLK
45
P4.1/PM_UCB1SIMO/PM_UCB1SDA
46
P4.2/PM_UCB1SOMI/PM_UCB1SCL
47
P4.3/PM_UCB1CLK/PM_UCA1STE
48
P4.4/PM_UCA1TXD/PM_UCA1SIMO
51
P4.5/PM_UCA1RXD/PM_UCA1SOMI
52
P4.6/PM_NONE
53
P4.7/PM_NONE
54
P6.4/CB4/A4
1
P6.5/CB5/A5
2
P6.6/CB6/A6
3
P6.7/CB7/A7
4
P7.0/CB8/A12
5
P7.1/CB9/A13
6
P7.2/CB10/A14
7
P7.3/CB1
1/A15
8
VS
SU
61
PU
.0
/D
P
62
PU
R
63
PU
.1
/D
M
64
VB
US
65
VU
SB
66
V1
8
67
AV
ss
2
68
P5
.2
/X
T2
IN
69
P5
.3
/X
T2
OU
T
70
TE
ST
/S
BW
TC
K
71
PJ
.0
/T
DO
72
PJ
.1
/T
DI/
TC
LK
73
PJ
.2
/T
MS
74
PJ
.3
/T
CK
75
!R
ST
/N
MI/
SB
WT
DIO
76
P1
.0
/T
A0
CL
K/A
CL
K
21
P1
.1
/T
A0
.0
22
P1
.2
/T
A0
.1
23
P1
.3
/T
A0
.2
24
P1
.4
/T
A0
.3
25
P1
.5
/T
A0
.4
26
P1
.6
/T
A1
CL
K/C
BO
UT
27
P1
.7
/T
A1
.0
28
P2
.6
/R
TC
CL
T/D
MA
E0
35
P8.0
15
P8.1
16
P8.2
17
P2
.0
/T
A1
.1
29
P2
.1
/T
A1
.2
30
P2
.3
/T
A2
.0
32
P2
.4
/T
A2
.1
33
P2
.5
/T
A2
.2
34
P2
.2
/T
A2
CL
K/S
MC
LK
31
P3.5/TB0.5
42
P3.6/TB0.6
43
P3.7/TB0OUT/SVMOUT
44
P5.6/TB0.0
55
P5.7/TB0.1
56
P7.4/TB0.2
57
P7.5/TB0.3
58
P7.6/TB0.4
59
P7.7/TB0CLK/MCLK
60
P6
.3
/C
B3
/A
3
80
P6
.2
/C
B2
/A
2
79
P6
.1
/C
B1
/A
1
78
P6
.0
/C
B0
/A
0
77
R1
17
22R
R1
17
22R
J12J12
1
2
R7
1.0M
R7
1.0M
R1
18
22R
R1
18
22R
J70
JT
AG
J70
JT
AG
1
2
3
4
5
6
J1
1
J1
J1
1
1
2
R3
1k4
R3
1k4
+
C15
10uF
+
C15
10uF
J72
HEADER1
J72
HEADER1
1
C79
4u7
C79
4u7
C3
220nF
C3
220nF
C46
10PF
C46
10PF
SW3
SWPUSHB
SW3
SWPUSHB
R1
19
22R
R1
19
22R
U7
TPD2E001DZD
U7
TPD2E001DZD
GND
1
IO1
2
IO2
3
Vcc
4
R108
0R0
R108
0R0
USB1
USB_MINI-B
USB1
USB_MINI-B
VBUS
1
D-
2
D+
3
IO
4
GND
5
Sh
ie
ld
1
GN
D1
Sh
ie
ld
2
GN
D2
Sh
ie
ld
3
GN
D3
Sh
ie
ld
4
GN
D4
C6
100nF
C6
100nF
+
C1
1
10uF
+
C1
1
10uF
C32
15pF
C32
15pF
C43
10PF
C43
10PF
Y1
4MHz
Y1
4MHz
R120
22R
R120
22R
R105
33k
R105
33k
C31
15pF
C31
15pF
C14
10000PF
C14
10000PF
R9
47K
R9
47K
www.ti.com
Schematic
Figure 3. Schematic – (2 of 3)
7
SCAU040 – March 2010
Quad Sine-Wave Clock Buffer Evaluation Board
Copyright © 2010, Texas Instruments Incorporated