Texas Instruments DAC8574 Evaluation Module DAC8574EVM DAC8574EVM 데이터 시트

3-6

Table 3 - 6 shows the function of each specific jumper setting of the EVM.

1

3

+5-V analog supply is selected for AV

DD

.

W1

1

3

+3.3-V analog supply is selected for AV

DD

.

1

3

Routes V

OUT

A to J4 - 2.

W2

1

3

Routes V

OUT

A to J4 - 10.

Disconnects V

REF

H to the inverting input of the output op-amp, U2

W3

Connects V

REF

H to the inverting input of the output op-amp, U2

1

3

Routes the adjustable, buffered, onboard +5-V reference to the V

REF

H input of the

DAC8574.

W4

1

3

Routes the user supplied reference from TP1 or J4 - 20 to the V

REF

H input of the

DAC8574.

1

3

Negative supply rail of the output op-amp, U2, is powered by V

SS

 for bipolar operation.

W5

1

3

Negative supply rail of the output op-amp, U2, is tied to AGND for unipolar operation.

1

3

V

REF

L is tied to AGND.

W6

1

3

Routes the user supplied negative reference from TP2 or J4 - 18 to the V

REF

L input

of the DAC8574. This voltage should be within the range of 0V to V

REF

H.

A0 pin is set high through pullup resistor, R4. A0 can be driven by GPIO5.

W7

A0 pin is set low.

A1 pin is set high through pullup resistor, R3. A1 can be driven by GPIO4.

W8

A1 pin is set low.

A3 pin is set high through pullup resistor, R2. A3 can be driven by GPIO1.

W9

LDAC pin is set low and DAC update is accomplished via software.

A2 pin is set high through pullup resistor, R1. A2 can be driven by GPIO3.

W10

A2 pin is set low.

1

3

Routes V

OUT

B to J4 - 4.

W11

1

3

Routes V

OUT

B to J4 - 12.