Texas Instruments TLV320AIC3104 Evaluation Module (EVM) and USB motherboard TLV320AIC3104EVM-K TLV320AIC3104EVM-K 데이터 시트
제품 코드
TLV320AIC3104EVM-K
SLAS510C – FEBRUARY 2007 – REVISED DECEMBER 2010
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DESCRIPTION (CONTINUED)
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering
in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-
kHz, and 48-kHz sample rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is
preceded by programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level
microphone inputs. The TLV320AIC3104 provides an extremely high range of programmability for both attack
(8–1,408 ms) and for decay (0.05–22.4 seconds). This extended AGC range allows the AGC to be tuned for
many types of applications.
in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-
kHz, and 48-kHz sample rates. The stereo audio ADC supports sampling rates from 8 kHz to 96 kHz and is
preceded by programmable gain amplifiers or AGC that can provide up to 59.5-dB analog gain for low-level
microphone inputs. The TLV320AIC3104 provides an extremely high range of programmability for both attack
(8–1,408 ms) and for decay (0.05–22.4 seconds). This extended AGC range allows the AGC to be tuned for
many types of applications.
For battery saving applications where neither analog nor digital signal processing are required, the device can be
put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of
the device is powered down during this passthrough operation.
put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of
the device is powered down during this passthrough operation.
The serial control bus supports the I
2
C protocol, whereas the serial audio data bus is programmable for I
2
S,
left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and
support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with
special attention paid to the most-popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system
clocks.
support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with
special attention paid to the most-popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system
clocks.
The TLV320AIC3104 operates from an analog supply of 2.7 V–3.6 V, a digital core supply of 1.525 V–1.95 V,
and a digital I/O supply of 1.1 V–3.6 V. The device is available in a 5-mm × 5-mm 32-pin QFN package.
and a digital I/O supply of 1.1 V–3.6 V. The device is available in a 5-mm × 5-mm 32-pin QFN package.
2
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