Texas Instruments TLV320AIC3104 Evaluation Module (EVM) and USB motherboard TLV320AIC3104EVM-K TLV320AIC3104EVM-K 데이터 시트
제품 코드
TLV320AIC3104EVM-K
SLAS510C – FEBRUARY 2007 – REVISED DECEMBER 2010
Table 2. TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
QFN NO.
I/O
AVDD
25
—
Analog DAC voltage supply, 2.7 V–3.6 V
AVSS1
17
—
Analog ADC ground supply, 0 V
AVSS2
26
—
Analog DAC ground supply, 0 V
BCLK
2
I/O
Audio serial data bus bit clock input/output
DIN
4
I
Audio serial data bus data input
DOUT
5
O
Audio serial data bus data output
DRVDD
18
—
Analog ADC and output driver voltage supply, 2.7 V–3.6 V
DRVDD
24
—
Analog output driver voltage supply, 2.7 V–3.6 V
DRVSS
21
—
Analog output driver ground supply, 0 V
DVDD
32
—
Digital core voltage supply, 1.525 V–1.95 V
DVSS
6
—
Digital core / I/O ground supply, 0 V
HPLCOM
20
O
High-power output driver (left – or multi-functional)
HPLOUT
19
O
High-power output driver (left +)
HPRCOM
22
O
High-power output driver (right – or multi-functional)
HPROUT
23
O
High-power output driver (right +)
IOVDD
7
—
Digital I/O voltage supply, 1.1 V–3.6 V
LEFT_LOM
28
O
Left line output (–)
LEFT_LOP
27
O
Left line output (+)
MCLK
1
I
Master clock input
MIC1LM/LINE1LM
11
I
Left input – (diff only)
MIC1LP/LINE1LP
10
I
Left input 1 (SE) or left input + (diff)
MIC1RM/LINE1RM
13
I
Right input – (diff only)
MIC1RP/LINE1RP
12
I
Right input 1 (SE) or right input + (diff)
MIC2L/LINE2L/MICDET
14
I
Left input 2 (SE); can support microphone detection
MIC2R/LINE2R
16
I
Right input 2 (SE)
MICBIAS
15
O
Microphone bias voltage output
RESET
31
I
Reset
RIGHT_LOM
30
O
Right line output (–)
RIGHT_LOP
29
O
Right line output (+)
SCL
8
I/O
I
2
C serial clock input
SDA
9
I/O
I
2
C serial data input/output
WCLK
3
I/O
Audio serial data bus word clock input/output
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