Texas Instruments DRV601EVM2 - DRV601 Evaluation Module DRV601EVM2 DRV601EVM2 데이터 시트
제품 코드
DRV601EVM2
www.ti.com
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Layout Recommendations
5.1
Exposed Pad on the DRV601RJT Package
5.2
SGND and PGND Connections
Layout Recommendations
The exposed metal pad on the DRV601RTJ package can be soldered to a pad on the PCB in order to
improve reliability. The pad on the PCB should be allowed to float and not be connected to ground or
power. Connecting this pad to power or ground prevents the device from working properly because it is
connected internally to PVSS.
improve reliability. The pad on the PCB should be allowed to float and not be connected to ground or
power. Connecting this pad to power or ground prevents the device from working properly because it is
connected internally to PVSS.
The SGND and PGND pins of the DRV601 must be routed separately back to the decoupling capacitor in
order to provide proper device operation. If the SGND pins are connected directly to each other, the part
functions without risk of failure, but the noise and THD performance can be reduced.
order to provide proper device operation. If the SGND pins are connected directly to each other, the part
functions without risk of failure, but the noise and THD performance can be reduced.
SLOU217 – March 2008
DRV601EVM2
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