Microchip Technology IC MCU 8BIT PIC18F65K22-I/PT TQFP-64 MCP PIC18F65K22-I/PT 데이터 시트
제품 코드
PIC18F65K22-I/PT
2009-2011 Microchip Technology Inc.
DS39960D-page 71
PIC18F87K22 FAMILY
TABLE 4-4:
EXIT DELAY ON WAKE-UP BY RESET FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
(BY CLOCK SOURCES)
Power-Managed
Mode
Clock Source
(
)
Exit Delay
Clock Ready
Status Bits
PRI_IDLE mode
LP, XT, HS
T
CSD(
OSTS
HSPLL
EC, RC
HF-INTOSC
(
HFIOFS
MF-INTOSC
MFIOFS
LF-INTOSC
None
SEC_IDLE mode
SOSC
T
CSD(
SOSCRUN
RC_IDLE mode
HF-INTOSC
(
T
CSD(
HFIOFS
MF-INTOSC
MFIOFS
LF-INTOSC
None
Sleep mode
LP, XT, HS
T
OST(
)
OSTS
HSPLL
T
OST
+ t
rc
EC, RC
T
CSD(
HF-INTOSC
(
T
IOBST(
)
HFIOFS
MF-INTOSC
MFIOFS
LF-INTOSC
None
Note 1:
T
CSD
(Parameter
) is a required delay when waking from Sleep and all Idle modes, and
runs concurrently with any other required delays (see
).
2:
Includes postscaler derived frequencies. On Reset, INTOSC defaults to HF-INTOSC at 8 MHz.
3:
T
OST
is the Oscillator Start-up Timer (Parameter
). T
RC
is the PLL Lock-out Timer
); it is also designated as T
PLL
.
4:
Execution continues during T
IOBST
(Parameter
), the INTOSC stabilization period.
5:
The clock source is dependent upon the settings of the SCS (OSCCON<1:0>), IRCF (OSCCON<6:4>)
and FOSC (CONFIG1H<3:0>) bits.
and FOSC (CONFIG1H<3:0>) bits.