Texas Instruments 3A Fast Response Ultra Low Dropout Linear Regulator LP38513S-1.8EV LP38513S-1.8EV 데이터 시트
제품 코드
LP38513S-1.8EV
ERROR Flag
If the Enable pin is driven from a single ended device (such as the collector of a discrete transistor) a pull-
up resistor to V
up resistor to V
IN
, or a pull-down resistor to ground, will be required for proper operation. A 1 k
Ω
to 100 k
Ω
resistor can be used as the pull-up or pull-down resistor to establish default condition for the EN pin. The
resistor value selected should be appropriate to swamp out any leakage in the external single ended
device, as well as any stray capacitance.
resistor value selected should be appropriate to swamp out any leakage in the external single ended
device, as well as any stray capacitance.
If the Enable pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail
comparator output), the pull-up, or pull-down, resistor is not required.
comparator output), the pull-up, or pull-down, resistor is not required.
If the application does not require the Enable function, the EN pin should be connected to directly to the
adjacent V
adjacent V
IN
pin.
The status of the Enable pin also affects the behavior of the ERROR Flag. While the Enable pin is high
the regulator control loop will be active and the ERROR Flag will report the status of the output voltage.
When the Enable pin is taken low the regulator control loop is shutdown, the output is turned off, and the
internal logic will immediately force the ERROR Flag pin low.
the regulator control loop will be active and the ERROR Flag will report the status of the output voltage.
When the Enable pin is taken low the regulator control loop is shutdown, the output is turned off, and the
internal logic will immediately force the ERROR Flag pin low.
Figure 2. Enable Threshold
5
ERROR Flag
When the LP38513 Enable pin is high, the ERROR Flag pin will produce a logic low signal when the
output drops by more than 10% (typical) from the nominal output voltage. The drop in output voltage may
be due to low input voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The
output voltage will need to rise to within 5% of the nominal output voltage for the ERROR Flag to return to
a logic high state. It should also be noted that when the Enable pin is pulled low, the ERROR Flag pin is
forced to be low as well.
output drops by more than 10% (typical) from the nominal output voltage. The drop in output voltage may
be due to low input voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The
output voltage will need to rise to within 5% of the nominal output voltage for the ERROR Flag to return to
a logic high state. It should also be noted that when the Enable pin is pulled low, the ERROR Flag pin is
forced to be low as well.
The internal ERROR flag comparator has an open drain output stage. Hence, the ERROR pin requires an
external pull-up resistor. The value of the pull-up resistor should be in the range of 2 k
external pull-up resistor. The value of the pull-up resistor should be in the range of 2 k
Ω
to 100 k
Ω
, and
should be connected to the LP38513 output voltage pin. The ERROR Flag pin should not be pulled-up to
any voltage source higher than V
any voltage source higher than V
IN
as current flow through an internal parasitic diode may cause
unexpected behavior. When the input voltage is less than typically 1.25V the status of the ERROR Flag
output will not be reliable. The ERROR Flag pin must be connected to ground if this function is not used.
output will not be reliable. The ERROR Flag pin must be connected to ground if this function is not used.
The timing diagram in
shows the relationship between the ERROR flag and the output voltage
when the pull-up resistor is connected to the output voltage pin.
The timing diagram in
shows the relationship between the ERROR flag and the output voltage
when the pull-up resistor is connected to the input voltage pin.
2
AN-1518 LP38513S-1.8 Evaluation Board
SNVA182A – August 2007 – Revised April 2013
Copyright © 2007–2013, Texas Instruments Incorporated