Texas Instruments THS7303EVM Evaluation Module THS7303EVM THS7303EVM 데이터 시트
제품 코드
THS7303EVM
SLOS479B
–
OCTOBER 2005
–
REVISED MARCH 2011
When the ac sync-tip-clamp (STC) operation is used, there must also be some finite amount of discharge bias
current. As previously described, if the input signal goes below the 135-mV clamp level, the internal loop of the
THS7303 sources current to increase the voltage appearing at the input pin. As the difference between the signal
level and the 135-mV reference level increases, the amount of source current increases proportionally, supplying
up to 2-mA of current. Thus, the time to re-establish the proper STC voltage can be very fast. If the difference is
small, then the source current is also small to account for minor voltage droop.
current. As previously described, if the input signal goes below the 135-mV clamp level, the internal loop of the
THS7303 sources current to increase the voltage appearing at the input pin. As the difference between the signal
level and the 135-mV reference level increases, the amount of source current increases proportionally, supplying
up to 2-mA of current. Thus, the time to re-establish the proper STC voltage can be very fast. If the difference is
small, then the source current is also small to account for minor voltage droop.
What happens if the input signal goes above the 135-mV input level? The problem is the video signal is always
above this level and must not be altered in any way. However, if the sync level of the input signal is above the
135-mV level, then the internal discharge (sink) current reduces the ac-coupled bias signal to the proper 135-mV
level.
above this level and must not be altered in any way. However, if the sync level of the input signal is above the
135-mV level, then the internal discharge (sink) current reduces the ac-coupled bias signal to the proper 135-mV
level.
This discharge current must not be large enough to alter the video signal appreciably or picture quality issues
may arise. This is often seen by looking at the tilt (droop) of a constant luma signal being applied, and looking at
the resulting output level. The associated change in luma level from the beginning of the video line to the end of
the video line is the amount of line tilt (droop). The amount of tilt can be seen by the general formula:
may arise. This is often seen by looking at the tilt (droop) of a constant luma signal being applied, and looking at
the resulting output level. The associated change in luma level from the beginning of the video line to the end of
the video line is the amount of line tilt (droop). The amount of tilt can be seen by the general formula:
I = C dV/dt
where I is the discharge current and C is the external coupling capacitor which is typically 0.1
μ
F. If the current (I)
and the capacitor (C) are constant, then the tilt is governed by:
I/C = dV/dt
If the discharge current is small, then the amount of tilt is low, which is good. However, the amount of time for the
system to capture the sync signal may be too long. This is also termed hum rejection. Hum arises from the ac
line voltage frequency of 50 Hz or 60 Hz. The value of the discharge current and the ac-coupling capacitor
combine to dictate the hum rejection and the amount of line tilt.
system to capture the sync signal may be too long. This is also termed hum rejection. Hum arises from the ac
line voltage frequency of 50 Hz or 60 Hz. The value of the discharge current and the ac-coupling capacitor
combine to dictate the hum rejection and the amount of line tilt.
Because many users have different thoughts about the proper amount of hum rejection and line tilt, the THS7303
has incorporated a variable sink bias current selectable through the I
has incorporated a variable sink bias current selectable through the I
2
C interface. The Low Bias mode selects
approximately 1.8-
μ
A of dc sink bias current for low line tilt. If more hum rejection is desired, then selecting the
Mid Bias mode increases the dc sink bias current to approximately 5.8
μ
A. For severe environments, the High
Bias mode has about 7.8
μ
A of dc sink bias current. The drawback to these higher bias modes is an increase in
line tilt, but with an increase in hum rejection. The other method to change the hum rejection and line tilt is to
change the input capacitor used. An increase in the capacitor from 0.1
change the input capacitor used. An increase in the capacitor from 0.1
μ
F to 0.22
μ
F decreases the hum
rejection and line tilt by a factor of 2.2. A decrease of this input capacitor accomplishes the opposite effect. Note
that the amplifier input bias current of nominally 0.6
that the amplifier input bias current of nominally 0.6
μ
A has already been taken into account when stipulating the
1.8-
μ
A, 5.8-
μ
A, and 7.8-
μ
A current sink values.
To ensure proper stability of the ac STC control loop, the source impedance must be less than 600-
Ω
and the
input capacitor must be greater than 0.01
μ
F. Otherwise, there is a possibility of the control loop ringing. The
ringing appears on the output of the THS7303. Similar to the dc modes of operation, many DACs and encoders
use a resistor to establish the output voltage. These resistors are typically less than 300
use a resistor to establish the output voltage. These resistors are typically less than 300
Ω
. Thus, stability of the
ac STC loop is ensured. If the source impedance looking from the THS7303 input perspective is high or open,
then adding a 300-
then adding a 300-
Ω
resistor to GND ensures proper operation of the THS7303.
If a MUX channel is not required in the system, it is recommended to place a 75-
Ω
resistor to GND. This is not
required, but it helps minimize any potential issues.
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Copyright
©
2005
–
2011, Texas Instruments Incorporated
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