Texas Instruments THS7303EVM Evaluation Module THS7303EVM THS7303EVM 데이터 시트
제품 코드
THS7303EVM
SLOS479B
–
OCTOBER 2005
–
REVISED MARCH 2011
ELECTRICAL CHARACTERISTICS: V
S+
= 3.3 V (continued)
R
L
= 150
Ω
to GND, filter select = 9 MHz, input bias = dc, and SAG pin shorted to the output pin (unless otherwise noted).
TYP
OVER TEMPERATURE
PARAMETER
TEST CONDITIONS
+25
°
C
+25
°
C
0
°
C to +70
°
C
–
40
°
C to +85
°
C
UNITS
MIN/MAX
DC PERFORMANCE
Output offset voltage
Bias = dc
35
90
95
95
mV
Max
Average offset voltage drift
Bias = dc
20
μ
V/
°
C
Bias = dc + 135 mV, V
I
= 0 V
290
235/345
215/360
200/375
mV
Min/Max
Bias output voltage
Bias = ac
1.65
1.5/1.8
1.45/1.85
1.45/1.85
V
Min/Max
Sync-tip-clamp output voltage
Bias = ac STC
290
210/370
200/380
195/385
mV
Min/Max
Input bias current
Bias = dc, implies I
B
out of the pin
–
0.6
–
4
–
5
–
5
μ
A
Max
Average bias current drift
Bias = dc
10
nA/
°
C
Bias = ac STC, low bias
1.8
0.6/3.3
0.5/3.5
0.4/3.6
μ
A
Min/Max
Sync-tip-clamp bias current
Bias = ac STC, mid bias
5.8
4.3/8.2
4.1/8.4
4/8.5
μ
A
Min/Max
Bias = ac STC, high bias
7.8
6.2/10.8
6/11
5.9/11.1
μ
A
Min/Max
INPUT CHARACTERISTICS
Input voltage range
Bias = dc, limited by output
0/1.57
0/1.52
0/1.47
0/1.47
V
Min/Max
Bias = ac bias mode
19
k
Ω
Input resistance
Bias = dc, dc + 135 mV, ac STC
3
M
Ω
Input capacitance
2
pF
OUTPUT CHARACTERISTICS
R
L
= 150
Ω
to +1.65V
3.15
2.9
2.8
2.8
V
Min
R
L
= 150
Ω
to GND
3.05
2.85
2.75
2.75
V
Min
High output voltage swing
R
L
= 75
Ω
to +1.65V
3.05
2.8
2.7
2.7
V
Min
R
L
= 75
Ω
to GND
2.9
2.65
2.55
2.55
V
Min
R
L
= 150
Ω
to +1.65V
0.14
0.24
0.27
0.28
V
Max
R
L
= 150
Ω
to GND
0.09
0.17
0.2
0.21
V
Max
Low output voltage swing
R
L
= 75
Ω
to GND
0.24
0.33
0.36
0.37
V
Max
R
L
= 75
Ω
to GND
0.09
0.17
0.2
0.21
V
Max
R
L
= 10
Ω
to +1.65V, sourcing
70
45
42
40
mA
Min
Output current
R
L
= 10
Ω
to +1.65V, sinking
70
45
42
40
mA
Min
POWER SUPPLY
Maximum operating voltage
3.3
5.5
5.5
5.5
V
Max
Minimum operating voltage
3.3
2.6
2.6
2.6
V
Min
Maximum quiescent current
Per channel V
I
= 200 mV
6
7.2
7.4
7.5
mA
Max
Minimum quiescent current
Per channel V
I
= 200 mV
6
4.8
4.6
4.5
mA
Min
Total quiescent current
All channels on, V
I
= 200 mV
(3)
16.6
mA
Power-supply rejection
V
S+
= 3.5 V to 3.1 V
62
37
35
35
dB
Min
(+PSRR)
DISABLE CHARACTERISTICS
Quiescent current
All 3 channels disabled
(4)
0.1
μ
A
Turn-on time delay (t
ON
)
Time reaches 50% of final value after
5
μ
s
I
2
C control is completed
Turn-on time delay (t
OFF
)
2
μ
s
DIGITAL CHARACTERISTICS
High-level input voltage
xxx
2.3
V
Typ
V
IH
Low-level input voltage
xx x
1.0
V
Typ
V
IL
(3)
Due to sharing of internal bias circuitry, the quiescent current (with all channels operating) is less than the single individual channel
quiescent currents added together.
quiescent currents added together.
(4)
Note that the I
2
C circuitry is still active while in Disable mode. The current shown is while there is no activity with the device I
2
C circuitry.
4
Copyright
©
2005
–
2011, Texas Instruments Incorporated
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