Texas Instruments 3.125 Gbps 1:4 LVDS Buffer Repeater Evaluation Board DS25BR204EVK/NOPB DS25BR204EVK/NOPB 데이터 시트

DS25BR204EVK User Manual 

Figure 2 shows the top layer drawing of the PCB with the silkscreen annotations.  The 5.25 by 
5.25 inch, eight-layer PCB is designed to evaluate the functions of the DS25BR204. 

 

 

5.25" x 5.25" PCB

VDD

VSS

L1

L2

0.625"

0.625"

0.625"

0.625"

IN2

0.625"

L3

0.625"

DS25BR204

L1

L2

0.625"

0.625"

L3

0.625"

0.625"

0.625"

0.625"

1.25"

0.625"

1.25"

0.625"

0.75"

0.75"

0.625"

0.625"

0.625"

0.625"

0.4375"

0.4375"

0.75"

0.75"

0.625"

0.625"

0.4375"

0.625"

0.625"

0.4375"

IN1

OUT2

OUT0

OUT3

OUT1

EQ1

EQ2

PE0

PE1

PE2

PE3

PWDN*

P/N:  DS25BR204EVK

S/N:

H      L

H      L

L      H

L      H

L      H

L      H

H

L

R17 – R18 

Footprints

H

L

LO

S

1*

LOS

2

*

P

W

DN0*

P

W

DN1*

P

W

DN2*

P

W

DN3*

J15 J16

J18 J19 J24 J22

H

L

J20

SEL_in

J12

J13

J7

J8

J9

J10

J17

IN2

IN1

 

 
 
 

Figure 2.  Top Layer DS25BR204EVK 

 
 

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