Texas Instruments Evaluation Module for UCD9224 Digital PWM System Controller UCD9224EVM-464 UCD9224EVM-464 데이터 시트
제품 코드
UCD9224EVM-464
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Test Procedure
5.
There are configuration value boxes in many of the plot windows, ex. OT Fault and OT Warn boxes
exist within the Temp Rail #1 plot. These are the numerical values for the fault and warning limits and
reflect the same values found on the Configuration page of the GUI.
exist within the Temp Rail #1 plot. These are the numerical values for the fault and warning limits and
reflect the same values found on the Configuration page of the GUI.
Change the OT Warn level from the pre-configured 85°C to 20°C and click the Write button, observe in
the Status Registers/Lines section of the Monitor page that the Temp Status has been updated from
OK to OT Warn and the SMBALERT# changes from Not Asserted to Asserted.
PMBus™ digital controllers are considered slave devices on the SMBus and as such they cannot
initiate communication with the system controller directly, but instead need to ask for assistance by
activating the SMBus Alert line, SMBALERT#. If the SMB Alert line is pulled low then the system
controller, the Fusion GUI for this example, will send an inquiry across the PMBus™ to determine
which controller requires assistance and why. Once the system controller has determined the issue
(and possibly initiated a response), then the faults can be cleared. Return the OT Warn level to 85°C
and click the Clear Faults button.
Now change the OT Fault level to 20°C and click the Write button, observe that several items changed
state within the Status Registers/Lines section. The Temp Status and Logged Faults both indicate OT
Fault, Misc Status indicates POWER_GOOD#, and the SMBALERT# is Asserted again.
POWER_GOOD# is an indication that one or both rails have violated either the Power_Good_ON or
_OFF thresholds in the configuration. In this case, it is the Power_Good_Off threshold because the
configured response for an OT Fault on Rail#1 had been set to Shut Down Immediately.
Warnings and faults are stored in RAM and will be cleared when power to the controller is cycled or
the Clear Faults button is exercised. Logged faults are stored in Flash and they are persistent after a
power cycle. Logged faults can be cleared with the Clear Logged Faults button.
Power cycle the UCD9224 EVM and the configuration will be returned to the original state before the
above changes were implemented.
the Status Registers/Lines section of the Monitor page that the Temp Status has been updated from
OK to OT Warn and the SMBALERT# changes from Not Asserted to Asserted.
PMBus™ digital controllers are considered slave devices on the SMBus and as such they cannot
initiate communication with the system controller directly, but instead need to ask for assistance by
activating the SMBus Alert line, SMBALERT#. If the SMB Alert line is pulled low then the system
controller, the Fusion GUI for this example, will send an inquiry across the PMBus™ to determine
which controller requires assistance and why. Once the system controller has determined the issue
(and possibly initiated a response), then the faults can be cleared. Return the OT Warn level to 85°C
and click the Clear Faults button.
Now change the OT Fault level to 20°C and click the Write button, observe that several items changed
state within the Status Registers/Lines section. The Temp Status and Logged Faults both indicate OT
Fault, Misc Status indicates POWER_GOOD#, and the SMBALERT# is Asserted again.
POWER_GOOD# is an indication that one or both rails have violated either the Power_Good_ON or
_OFF thresholds in the configuration. In this case, it is the Power_Good_Off threshold because the
configured response for an OT Fault on Rail#1 had been set to Shut Down Immediately.
Warnings and faults are stored in RAM and will be cleared when power to the controller is cycled or
the Clear Faults button is exercised. Logged faults are stored in Flash and they are persistent after a
power cycle. Logged faults can be cleared with the Clear Logged Faults button.
Power cycle the UCD9224 EVM and the configuration will be returned to the original state before the
above changes were implemented.
17
SLUU443 – March 2011
UCD9224EVM-464 Digitally Controlled Dual-Rail POL
© 2011, Texas Instruments Incorporated