Texas Instruments High Performance Synchronous Buck Evaluation Module Using TPS51125A TPS51125AEVM TPS51125AEVM 데이터 시트
제품 코드
TPS51125AEVM
Configuration
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5
Configuration
This EVM can be set at a configuration of the user's choice. Please refer to the following specific
configuration setting sections
configuration setting sections
5.1
Switching Frequency Selection
The switching frequency can be set by the TONSEL pin using JP1 on the EVM. The default setting is
245 kHz for CH1 and 305 kHz for CH2.
245 kHz for CH1 and 305 kHz for CH2.
Table 2. Switching Frequency Selection
SWITCHING FREQUENCY (kHz)
TONSEL
CONNECTION
CH1
CH2
GND (SLOW)
200
250
VREF (MED1)
245
305
VREG3 (MED2)
300
375
VREG5 (FAST)
365
460
5.2
Operation Mode Selection
Operation mode can be set by the SKIPSEL pin using JP2 on the EVM. The default setting on the EVM is
auto-skip mode.
auto-skip mode.
Table 3. Operation Mode Selection
SKIPSEL CONNECTION
OPERATION MODE
GND
PWM only
VREF
Auto skip
VREG5
Out-of-Audio™
5.3
VCLK ON/OFF Selection
The VCLK drive for the charge-pump can be disabled by pulling down EN0 with 620 k
Ω
of resistance
using S1 on the EVM.
Table 4. VLCK Control
END CONNECTION
VCLK
OPEN
ENABLED
Pull down to GND with 620 k
Ω
DISABLED
6
Physical Layouts
This section provides the board layout and assembly drawings for the EVM, that include the top layer
(
(
), the bottom layer (
), and inner layer views (
and
) of the EVM.
6
High Performance Synchronous Buck EVM Using the TPS51125A
SLUU408 – FEBRUARY 2010
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