Texas Instruments TPS65820 Evaluation Module TPS65820EVM TPS65820EVM 데이터 시트
제품 코드
TPS65820EVM
Power Path Logic: Priority Algorithm
Input Current Limit
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SLVS663B – MAY 2006 – REVISED APRIL 2008
lists the system power detection conditions. V
IN(DT)
, V
OUTSH
, V
BATSH
, V
OVP
are TPS65820 internal
references, refer to the electrical characteristics for additional details.
Table 6. System Status Detection, Charger and Power Path Section
AC input voltage detected
V
(AC)
– V
(BAT)
> V
IN(DT)
USB input voltage detected
V
(USB)
– V
(BAT)
> V
IN(DT)
AC overvoltage detected
V
(AC)
> V
OVP
USB overvoltage detected
V
(USB)
> V
OVP
AC PIN TO OUT pin OR USB TO OUT PIN short detected
V
(OUT)
< V
INOUTSH
BAT pin to OUT pin short detected
V
(BAT)
– V
(OUT)
> V
BATOUTSH
Battery supplement mode need detected
V
(BAT)
– V
(OUT)
> V
SUP
Blank BAT to OUT short-circuit detection
V
(DPPM)
< 1V
The system power bus supply is automatically selected by the power path control logic, following an internal
algorithm. The power path function detects an external input power connection when the input voltage exceeds
the battery pack voltage. It also detects a supplement mode need (battery switch must be turned ON) when the
system voltage (OUT pin) is below the battery voltage. A connected and non-selected external supply or the
battery is automatically switched to the system bus, following the priority algorithm, when the external supply
currently selected is disconnected from the system.
algorithm. The power path function detects an external input power connection when the input voltage exceeds
the battery pack voltage. It also detects a supplement mode need (battery switch must be turned ON) when the
system voltage (OUT pin) is below the battery voltage. A connected and non-selected external supply or the
battery is automatically switched to the system bus, following the priority algorithm, when the external supply
currently selected is disconnected from the system.
The input power priority is hard-wired internally, with the AC input having the higher priority, followed by the USB
input (2
input (2
nd
) and the battery pack (3
rd
). Using the I
2
C CHG_CONFIG register control bit CE the user can override
the power path algorithm, connecting the battery to the system power bus. Care must be taken when using the
battery to system connection option, as the system power bus is not connected back to the AC or USB inputs
(even if those are detected) when the battery is removed.
battery to system connection option, as the system power bus is not connected back to the AC or USB inputs
(even if those are detected) when the battery is removed.
describes the priority algorithm.
Table 7. Power Path Control Logic Priority Algorithm
EXTERNAL SUPPLY
SWITCH MODE
CE BIT
SYSTEM POWER
DETECTED
(I
2
C CHG_CONFIG Register)
SOURCE
AC
USB
AC
USB
Battery
YES
NO
ON
OFF
AC
NO
YES
OFF
ON
USB
ON if supplement mode is
HI
required, OFF otherwise
YES
YES
ON
OFF
AC
NO
NO
OFF
OFF
BATTERY
LO
XX
XX
OFF
OFF
ON
BATTERY
The power path status is stored in register CHG_STAT.
The USB input current is limited to the maximum value programmed by the host, using the I
2
C interface. If the
system current requirements exceed the input current limit, the output voltage collapses, the charge current is
reduced, and finally, the supplement mode is set. The input current limit value is set with the I
reduced, and finally, the supplement mode is set. The input current limit value is set with the I
2
C charge control
register bits PSEL and ISET2, and it is applied to the USB input ONLY. The AC input current limit is fixed to the
internal short-circuit limit value.
internal short-circuit limit value.
Table 8. Charge Current Scaling via I
2
C
INPUT CURRENT LIMIT
PSEL (I
2
C)
ISET2 (I
2
C)
USB
AC
LO
LO
100 mA
2.75 A
LO
HI
500 mA
2.75 A
HI
LO
2.75 A
2.75 A
HI
HI
2.75 A
2.75 A
Copyright © 2006–2008, Texas Instruments Incorporated
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