Texas Instruments CC2530ZDK-ZLL 데이터 시트
Time
DEBUG_ CLK
P2_2
DEBUG_DATA
(to CC253x)
P2_1
DEBUG_DATA
(from CC253x)
P2_1
T0438-01
t
6
t
8
t
7
SWRS081B
–
APRIL 2009
–
REVISED FEBRUARY 2011
Figure 6. Debug Enable Timing
TIMER INPUTS AC CHARACTERISTICS
T
A
=
–
40
°
C to 125
°
C, VDD = 2 V to 3.6 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Synchronizers determine the shortest input pulse that can be
t
SYSCLK
Input capture pulse duration
recognized. The synchronizers operate at the current system
1.5
clock rate (16 or 32 MHz).
16
©
2009
–
2011, Texas Instruments Incorporated
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