Texas Instruments LP3907SQ-JXQX Evaluation Board LP3907SQ-JXQXEV/NOPB LP3907SQ-JXQXEV/NOPB 데이터 시트
제품 코드
LP3907SQ-JXQXEV/NOPB
PCB Layout Considerations
9
PCB Layout Considerations
The evaluation board layers from top to bottom are:
1. Top, component side
2. Ground plane
3. Mid signal section
4. Bottom, solder side
For good performance of the circuit, it is essential to place the input and output capacitors very close to
the circuit and use wide routing for the traces allowing high currents.
the circuit and use wide routing for the traces allowing high currents.
Sensitive components should be placed far from those components with high pulsating current.
Decoupling capacitors should be close to circuit’s VIN pins. Digital and analog ground should be routed
separately and connected together in a star connection.
separately and connected together in a star connection.
It’s good practice to minimize high current and switching current paths.
9.1
Low Drop Out Regulators
Place the filter capacitors very close to the input and output pins. Use large trace width for high current
carrying traces and the returns to ground.
carrying traces and the returns to ground.
9.2
Buck Regulators
Place the supply bypass, filter capacitor, and inductor close together and keep the traces short. The traces
between these components carry relatively high switching current and act as antennas. Following these
rules reduces radiated noise.
between these components carry relatively high switching current and act as antennas. Following these
rules reduces radiated noise.
Arrange the components so that the switching current loops curl in the same direction.
Connect the buck ground and the ground of the capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then connect this back to the general board system ground plane at
a single point. Place the pseudo-ground plane below these components and then have it tied to system
ground of the output capacitor outside of the current loops. This prevents the switched current from
injecting noise into the system ground. These components along with the inductor and output should be
placed on the same side of the circuit board, and their connections should be made on the same layer.
copper fill as a pseudo-ground plane. Then connect this back to the general board system ground plane at
a single point. Place the pseudo-ground plane below these components and then have it tied to system
ground of the output capacitor outside of the current loops. This prevents the switched current from
injecting noise into the system ground. These components along with the inductor and output should be
placed on the same side of the circuit board, and their connections should be made on the same layer.
Route noise sensitive traces such as the voltage feedback path away from the inductor. This is done by
routing it on the bottom layer or by adding a grounded copper area between switching node and feedback
path. To reduce noisy traces between the power components, keep any digital lines away from this
section. Keep the Feedback node as small as possible so that the ground pin and ground traces will shield
it from the SW or buck output.
routing it on the bottom layer or by adding a grounded copper area between switching node and feedback
path. To reduce noisy traces between the power components, keep any digital lines away from this
section. Keep the Feedback node as small as possible so that the ground pin and ground traces will shield
it from the SW or buck output.
Use wide traces between the power components and for power connections to the DC-DC converter
circuit to reduce voltage errors caused by resistive losses.
circuit to reduce voltage errors caused by resistive losses.
For the sense lines, make sure to use a Kelvin contact connection.
15
SNVA233A – September 2007 – Revised April 2013
AN-1619 Evaluation Kit for LP3907 — Programmable Power Management
Unit with 1
2
C Compatible Interface
Copyright © 2007–2013, Texas Instruments Incorporated