Texas Instruments THS7319EVM Evaluation Module THS7319EVM THS7319EVM 데이터 시트
제품 코드
THS7319EVM
PIN CONFIGURATION
Device Code
Year and Month
of Assembly
of Assembly
Pin A1 Index
NXN
YM
A
2
1
3
B
C
Ch 1 IN
GND
Ch 1 OUT
Ch 2 IN
EN
Ch 2 OUT
Ch 3 IN
V
S+
Ch 3 OUT
V
S+
Enable
LPF
3-Pole
20-MHz
6 dB
x1
Level
Shift
LPF
3-Pole
20-MHz
6 dB
x1
Level
Shift
LPF
3-Pole
20-MHz
6 dB
x1
Level
Shift
Channel 1 Input
Channel 1 Output
Channel 2 Input
Channel 2 Output
Channel 3 Input
Channel 3 Output
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SBOS468A – JUNE 2009 – REVISED JULY 2009
ZSV PACKAGE
ZSV PACKAGE
MicrostarCSP 9-BALL
MicrostarCSP 9-BALL
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Table 1. TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
Channel 1 Input
A1
I
Video input, channel 1
GND
A2
I
Ground pin for all internal circuitry
Channel 1 Output
A3
O
Video output, channel 1
Channel 2 Input
B1
I
Video input, channel 2
Enable pin. Logic high enables the THS7319; logic low disables the THS7319.
Enable
B2
I
This pin must not be left floating.
Channel 2 Output
B3
O
Video output, channel 2
Channel 3 Input
C1
I
Video Input, channel 3
V
S+
C2
I
Positive power-supply pin; connect to +2.6 V or +5 V.
Channel 3 Output
C3
O
Video output, channel 3
FUNCTIONAL BLOCK DIAGRAM
Copyright © 2009, Texas Instruments Incorporated
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