Texas Instruments LMK01000 Evaluation Board LMK01000EVAL/NOPB LMK01000EVAL/NOPB 데이터 시트
제품 코드
LMK01000EVAL/NOPB
CLKin0
CLKin0*
CLKout0
CLKout0*
CLKout0*
CLKout1
CLKout1*
CLKout1*
CLKout2
CLKout2*
CLKout2*
CLKout3
CLKout3*
CLKout3*
CLKout4
CLKout4*
CLKout4*
CLKout5
CLKout5*
CLKout5*
CLKout6
CLKout6*
CLKout6*
CLKout7
CLKout7*
CLKout7*
Divider
Delay
Mux
Divider
Delay
Mux
Divider
Delay
Mux
Divider
Delay
Mux
Divider
Delay
Mux
Divider
Delay
Mux
Divider
Delay
Mux
Divider
Delay
Mux
Distribution Path
CLK
DATA
LE
Control
Registers
P
Wire
Port
Device
Control
GOE
SYNC*
CLKin1
CLKin1*
Low Clock Buffers
High Clock Buffers
Mux
LMK010x0
Clock Divider and
Distributor
CLKout7
CLKout4
CLKout1
CLKout0
Serializer/
Deserializer
LMX2531
PLL+VCO
ADC
FPGA
CLKin0
CLKin1
LMK010x0
Clock Divider and
Distributor
CLKout7
CLKout0
LMX2531
PLL+VCO
ADC
CLKin1
ADC
SNAS437G – FEBRUARY 2008 – REVISED OCTOBER 2009
System Diagram
Functional Block Diagram
2
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Links: