Texas Instruments Evaluation Module for TPS54120 1A Power Supply w/ Integrated DC-DC Converter & Low-Dropout Regulator T TPS54120EVM-103 데이터 시트
제품 코드
TPS54120EVM-103
Operation
Table 3. Sample 1% Resistor Values for Common LDO Output Voltages
(continued)
LDO Output Voltage (V)
R1 Value (k
Ω
)
1.2
4.99
1.5
8.87
1.8
12.5
2.5
21
3.3
30.9
5
52.3
2.2.3
Switcher Slow Start Time
The slow start time can be adjusted by changing the value of C7. Use
to calculate the required
value of C7 for a desired slow start time (Tss)
C7(nF) = Tss(ms) Iss(
μ
A)/Vref(V)
(3)
Basically the device has an internal pull-up current source of 2.3
μ
A=Iss that charges the external slow
start capacitor C7. The voltage reference Vref(V) for this part is 0.8V.
2.2.4
LDO Start Up
The start up time of the LDO can be adjusted by changing the value of C13. In addition to start up time,
the capacitor on the NR pin is used for noise reduction as well. However, the noise reduction effect is
nearly saturated at 0.01
the capacitor on the NR pin is used for noise reduction as well. However, the noise reduction effect is
nearly saturated at 0.01
µ
F.
2.3
Equipment Interconnect
•
Turn off the input power supply after verifying that its output voltage is set to the desired supply voltage
(less than 17V) and the current limit is set to approximately 500mA. Connect the positive voltage lead
from the input power supply to J3 (Vin) and the ground lead to J4 (GND).
(less than 17V) and the current limit is set to approximately 500mA. Connect the positive voltage lead
from the input power supply to J3 (Vin) and the ground lead to J4 (GND).
•
Connect a 0-1A load (I
Load
) between LDO OUT and GND using J1 and J2
•
Disable the output of the LDO by connecting a shorting jumper at JP1 from the
“
off
”
pin to the center
pin (LDO EN).
3
Operation
•
Turn on the input power supply. Verify that the switcher output voltage is near 4.1V and the LDO
output is near 0V.
output is near 0V.
•
Enable the LDO output by connecting the jumper on JP1 from the
“
on
”
pin to the center pin (LDO EN).
•
Verify that the LDO output voltage is 3.3V.
•
Vary the load current and VIN voltage as necessary for test purposes.
4
Test Results
This section provides typical performance waveforms for the TPS54120EVM (PWR103) characteristic of
this EVM design.
this EVM design.
4
TPS54120EVM, Low Noise 1A Power Supply Evaluation Module
SLVU641
–
January 2012
Copyright
©
2012, Texas Instruments Incorporated