Texas Instruments DAC8565EVM - DAC8565 Evaluation Module DAC8565EVM DAC8565EVM 데이터 시트
제품 코드
DAC8565EVM
3.3
EVM Stacking
3.4
The Output Operational Amplifier
1 2 3
JMP15
1 2 3
JMP15
Bottom
EVM
Top
EVM
1 2 3
JMP16
1 2 3
JMP16
Top EVM, J4A
Bottom EVM, J4A
Shunt J4A pins 1 and 2
Shunt J4A pins 3 and 4
Monitor DAC output of
top EVM on J4A pin 5
Monitor DAC output of
bottom EVM on J4A pin 7
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EVM Operation
The stacking of EVM is possible if there is a need to evaluate two DAC8564/65 devices to yield a total of
up to eight (DAC8564/65) channel outputs. A maximum of two EVMs are allowed since the output
terminal, J4, dictates the number of DAC channels that can be connected without output bus contention.
up to eight (DAC8564/65) channel outputs. A maximum of two EVMs are allowed since the output
terminal, J4, dictates the number of DAC channels that can be connected without output bus contention.
shows how the DAC output channels are mapped into the output terminal, J4, with respect to the
jumper position of JMP11, JMP12, JMP13 and JMP14.
Table 3. DAC Output Channel Mapping
Reference
Jumper Position
Function
JMP11
1-2
DAC output (V
OUT
A) is routed to J4-2.
2-3
DAC output (V
OUT
A) is routed to J4-10.
JMP12
1-2
DAC output (V
OUT
B) is routed to J4-4.
2-3
DAC output (V
OUT
B) is routed to J4-12.
JMP13
1-2
DAC output (V
OUT
C) is routed to J4-6.
2-3
DAC output (V
OUT
C) is routed to J4-14.
JMP14
1-2
DAC output (V
OUT
D) is routed to J4-8.
2-3
DAC output (V
OUT
D) is routed to J4-16.
In order to allow exclusive control of each EVM that are stacked together, the DAC8564/65 must have
separate SYNC signal. This is accomplished in hardware by routing the SYNC signal of the first EVM
through CS (J2A/J2B pin 1) by shorting pins 1-2 of jumper JMP18. The second EVM should use the FSX
signal (J2A/J2B pin 7) to drive the SYNC signal by shorting pins 2-3 of the jumper JMP18. The outputs
can be mapped as described in
separate SYNC signal. This is accomplished in hardware by routing the SYNC signal of the first EVM
through CS (J2A/J2B pin 1) by shorting pins 1-2 of jumper JMP18. The second EVM should use the FSX
signal (J2A/J2B pin 7) to drive the SYNC signal by shorting pins 2-3 of the jumper JMP18. The outputs
can be mapped as described in
for each of the EVM stacked.
The EVM includes an optional signal conditioning circuit for the DAC output through an external
operational amplifier, U2. During stacking of EVM, only two DAC output channels can be monitored at any
given time for evaluation because of the way the odd numbered pins of J4 header (J4A-1 to J4A-7) are
configured. See the schematic included in this manual and
operational amplifier, U2. During stacking of EVM, only two DAC output channels can be monitored at any
given time for evaluation because of the way the odd numbered pins of J4 header (J4A-1 to J4A-7) are
configured. See the schematic included in this manual and
Figure 18. DAC8564/65 EVM Output Operational Amplifier Jumper Configuration for Stacking
The output operational amplifier is set to unity gain configuration by default but can be modified by simple
jumper settings. Nevertheless, the raw output of the DAC can be probed through the specified pins of J4
output terminal, which also provides mechanical stability when stacking or plugging into any interface
board. In addition, it provides easy access for monitoring up to two (DAC8564/65) DAC channels when
stacking two EVMs together (see
jumper settings. Nevertheless, the raw output of the DAC can be probed through the specified pins of J4
output terminal, which also provides mechanical stability when stacking or plugging into any interface
board. In addition, it provides easy access for monitoring up to two (DAC8564/65) DAC channels when
stacking two EVMs together (see
).
SLAU252 – June 2008
DAC8564/65 Evaluation Module
19