Texas Instruments TLV62150EVM-505 Evaluation Module TLV62150EVM-505 TLV62150EVM-505 데이터 시트
제품 코드
TLV62150EVM-505
40
50
60
70
80
90
100
0.0001
0.001
0.01
0.1
1
10
Load Current - A
V = 5 V
I
V = 9 V
I
V = 12 V
I
V = 15 V
I
V = 17 V
I
Efficiency - %
TLV621x0EVM-505 Test Results
JP3 – FSW
FSW pin input jumper. Place the supplied jumper across 1.25 MHz and FSW to
operate the IC at a reduced switching frequency of nominally 1.25 MHz. Place the
jumper across 2.5 MHz and FSW to operate the IC at the full switching frequency
of nominally 2.5 MHz.
operate the IC at a reduced switching frequency of nominally 1.25 MHz. Place the
jumper across 2.5 MHz and FSW to operate the IC at the full switching frequency
of nominally 2.5 MHz.
JP4 – PG Pullup
PG pin pullup voltage jumper. Place the supplied jumper on JP4 to connect the
Voltage
PG pin pullup resistor to Vout. Alternatively, the jumper can be removed and a
different voltage can be supplied on pin 2 to pull up the PG pin to a different level.
This externally applied voltage must remain below 7 V.
different voltage can be supplied on pin 2 to pull up the PG pin to a different level.
This externally applied voltage must remain below 7 V.
2.2
Setup
To operate the EVM, set jumpers JP1 through JP4 to the desired positions per
. Connect the
input supply to either J1 and J3 or J8, and connect the load to either J4 and J6 or J9.
3
TLV621x0EVM-505 Test Results
This section provides test results of the TLV621x0EVM-505.
Figure 2. Efficiency With 1-µH Inductor and FSW = LOW (High Frequency)
4
TLV62130EVM-505 and TLV62150EVM-505 Evaluation Modules
SLAU416A – January 2012 – Revised July 2013
Copyright © 2012–2013, Texas Instruments Incorporated