Texas Instruments TMS320C6472 Evaluation Module TMDSEVM6472LE TMDSEVM6472LE 데이터 시트
제품 코드
TMDSEVM6472LE
PRODUCTPREVIEW
SPRS612G
–
JUNE 2009
–
REVISED JULY 2011
7.15.5
Management Data Input/Output (MDIO)
The Management Data Input/Output (MDIO) module implements the 802.3 serial management interface to
interrogate and controls up to 32 Ethernet PHY(s) connected to the device, using a shared two-wire bus.
Application software uses the MDIO module to configure the negotiation parameters of each PHY
attached to the EMAC, retrieve the negotiation results, and configure required parameters in the EMAC
module for correct operation. The module is designed to allow almost transparent operation of the MDIO
interface, with very little maintenance from the core processor.
interrogate and controls up to 32 Ethernet PHY(s) connected to the device, using a shared two-wire bus.
Application software uses the MDIO module to configure the negotiation parameters of each PHY
attached to the EMAC, retrieve the negotiation results, and configure required parameters in the EMAC
module for correct operation. The module is designed to allow almost transparent operation of the MDIO
interface, with very little maintenance from the core processor.
The EMAC control module is the main interface between the device core processor, the MDIO module,
and the EMAC module. The relationship between these three components is shown in
and the EMAC module. The relationship between these three components is shown in
The MDIO uses the same pins for the MII, GMII, S3MII, and RMII modes. Standalone pins are included for
the RGMII mode due to specific voltage requirements. Only one mode can be used at a time. The mode
used is selected at device reset based on the MACSEL0[2:0] configuration pins (for more detailed
information, see
the RGMII mode due to specific voltage requirements. Only one mode can be used at a time. The mode
used is selected at device reset based on the MACSEL0[2:0] configuration pins (for more detailed
information, see
, Device Configuration section of this document).
For more detailed information on the EMAC/MDIO, see the TMS320C6472/TMS320TCI6486 DSP
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) Module User's Guide
(literature number
Ethernet Media Access Controller (EMAC)/Management Data Input/Output (MDIO) Module User's Guide
(literature number
7.15.5.1 MDIO Device-Specific Information
Clocking Information
The on-chip PLL2 and PLL2 Controller generate all the clocks to the MDIO module. When enabled, the
input clock to the PLL2 Controller (CLKIN2) must have a 25-MHz frequency. For more information, see
input clock to the PLL2 Controller (CLKIN2) must have a 25-MHz frequency. For more information, see
, PLL2 and PLL2 Controller of this document.
7.15.5.2 MDIO Peripheral Register Descriptions
Table 7-124. MDIO Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
02C8 1800
VERSION
MDIO Version Register
02C8 1804
CONTROL
MDIO Control Register
02C8 1808
ALIVE
MDIO PHY Alive Status Register
02C8 180C
LINK
MDIO PHY Link Status Register
02C8 1810
LINKINTRAW
MDIO Link Status Change Interrupt (Unmasked) Register
02C8 1814
LINKINTMASKED
MDIO Link Status Change Interrupt (Masked) Register
02C8 1818 - 02C8 181C
-
Reserved
02C8 1820
USERINTRAW
MDIO User Command Complete Interrupt (Unmasked) Register
02C8 1824
USERINTMASKED
MDIO User Command Complete Interrupt (Masked) Register
02C8 1828
USERINTMASKSET
MDIO User Command Complete Interrupt Mask Set Register
02C8 182C
USERINTMASKCLEAR
MDIO User Command Complete Interrupt Mask Clear Register
02C8 1830 - 02C8 187C
-
Reserved
02C8 1880
USERACCESS0
MDIO User Access Register 0
02C8 1884
USERPHYSEL0
MDIO User PHY Select Register 0
02C8 1888
USERACCESS1
MDIO User Access Register 1
02C8 188C
USERPHYSEL1
MDIO User PHY Select Register 1
02C8 1890 - 02C8 1FFC
-
Reserved
Copyright
©
2009
–
2011, Texas Instruments Incorporated
C64x+ Peripheral Information and Electrical Specifications
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