Texas Instruments TMS320C6472 Evaluation Module TMDSEVM6472LE TMDSEVM6472LE 데이터 시트
제품 코드
TMDSEVM6472LE
PRODUCTPREVIEW
SPRS612G
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JUNE 2009
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REVISED JULY 2011
4
System Interconnect
On the C6472 device, the C64x+ megamodule, the EDMA3 transfer controllers, and the system
peripherals are interconnected through two switch fabrics. The switch fabrics allow for low-latency,
concurrent data transfers between peripherals and memories. The switch fabrics also allow for seamless
arbitration between the system masters when accessing system slaves.
peripherals are interconnected through two switch fabrics. The switch fabrics allow for low-latency,
concurrent data transfers between peripherals and memories. The switch fabrics also allow for seamless
arbitration between the system masters when accessing system slaves.
4.1
Internal Buses, Bridges, and Switch Fabrics
Two types of buses exist in the C6472 device: data buses and configuration buses. Some C6472
peripherals have both a data bus and a configuration bus interface, while others only have one type of
interface. Furthermore, the bus interface width and speed varies from peripheral to peripheral.
Configuration buses are mainly used to access the register space of a peripheral and the data buses are
used mainly for data transfers.
peripherals have both a data bus and a configuration bus interface, while others only have one type of
interface. Furthermore, the bus interface width and speed varies from peripheral to peripheral.
Configuration buses are mainly used to access the register space of a peripheral and the data buses are
used mainly for data transfers.
The C64x+ megamodule, the EDMA3 transfer controllers, and the various system peripherals can be
classified into two categories: masters and slaves. Masters are capable of initiating read and write
transfers in the system and do not rely on the EDMA3 for their data transfers. Slaves, on the other hand,
rely on the EDMA3 to perform transfers to and from them. Masters include the EDMA3 transfer controllers,
EMAC, TSIP, HPI, UTOPIA, and SRIO. Slaves include the EMIF and I2C.
classified into two categories: masters and slaves. Masters are capable of initiating read and write
transfers in the system and do not rely on the EDMA3 for their data transfers. Slaves, on the other hand,
rely on the EDMA3 to perform transfers to and from them. Masters include the EDMA3 transfer controllers,
EMAC, TSIP, HPI, UTOPIA, and SRIO. Slaves include the EMIF and I2C.
The C6472 device contains two switch fabrics through which masters and slaves communicate: the data
switch fabric, known as the data switched central resource (SCR) and configuration switch fabric, known
as the configuration switched central resource (SCR). The data SCR is a high-throughput interconnect
mainly used to move data across the system (for more information, see
switch fabric, known as the data switched central resource (SCR) and configuration switch fabric, known
as the configuration switched central resource (SCR). The data SCR is a high-throughput interconnect
mainly used to move data across the system (for more information, see
). The data SCR
connects masters to slaves via 128-bit data buses running at a SYSCLK7 frequency, generated from the
PLL1 controller. Peripherals that have a 128-bit data bus interface running at this speed can connect
directly to the data SCR; other peripherals require a bridge. The configuration SCR is mainly used by the
C64x+ megamodules to access peripheral registers (for more information, see
PLL1 controller. Peripherals that have a 128-bit data bus interface running at this speed can connect
directly to the data SCR; other peripherals require a bridge. The configuration SCR is mainly used by the
C64x+ megamodules to access peripheral registers (for more information, see
). The
configuration SCR connects C64x+ megamodules to slaves via 32-bit configuration buses also running at
a SYSCLK7 frequency. As with the data SCR, some peripherals require the use of a bridge to interface to
the configuration SCR. Note that the data SCR also connects to the configuration SCR.
a SYSCLK7 frequency. As with the data SCR, some peripherals require the use of a bridge to interface to
the configuration SCR. Note that the data SCR also connects to the configuration SCR.
Bridges perform a variety of functions:
•
Conversion between configuration bus and data bus.
•
Width conversion between peripheral bus width and SCR bus width.
•
Frequency conversion between peripheral bus frequency and SCR bus frequency.
For example, TSIP modules require a bridge to convert their 32-bit data bus interface into a 128-bit
interface so that they can connect to the data SCR. Note that some peripherals can be accessed through
the data SCR and also through the configuration SCR.
interface so that they can connect to the data SCR. Note that some peripherals can be accessed through
the data SCR and also through the configuration SCR.
90
System Interconnect
Copyright
©
2009
–
2011, Texas Instruments Incorporated
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