Texas Instruments F28M36 Concerto Control Card TMDSCNCD28M36 TMDSCNCD28M36 데이터 시트
제품 코드
TMDSCNCD28M36
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
The boot process can be considered completed once the Cortex-M3 and C28x are both running out of
their respective application programs. Note that following the boot sequence, the C-Bootloader is still
available to interpret and act upon an assortment of IPC commands that can be issued from the Master
Subsystem to perform a variety of configuration, housekeeping, and other functions.
their respective application programs. Note that following the boot sequence, the C-Bootloader is still
available to interpret and act upon an assortment of IPC commands that can be issued from the Master
Subsystem to perform a variety of configuration, housekeeping, and other functions.
3.9
Internal Voltage Regulation and Power-On-Reset Functionality
While Concerto’s analog functions draw power from a single dedicated external power source—V
DDA
, its
digital circuits are powered by three separate rails: 3.3-V V
DDIO
, 1.8-V V
DD18
, and 1.2-V V
DD12
. This section
describes the sourcing, regulation, and POR functionality for these three digital power rails.
Concerto devices can be internally divided into an Analog Subsystem and a Digital Subsystem (having the
Cortex-M3-based Master Subsystem and the C28x-based Control Subsystem). The Digital Subsystem
uses V
Cortex-M3-based Master Subsystem and the C28x-based Control Subsystem). The Digital Subsystem
uses V
DD12
to power the two processors, internal memory, and peripherals. The Analog Subsystem uses
V
DD18
to power the digital logic associated with the analog functions. Both Digital and Analog Subsystems
share a common V
DDIO
rail to power their 3.3-V I/O buffers through which Concerto’s digital signals
communicate with the outside world.
The Analog and Digital Subsystems each have their own POR circuits that operate independently. With
the ARS and XRS reset pins externally tied together, both systems can come out of reset together, and
can also be put in reset together by driving both reset pins low. See
the ARS and XRS reset pins externally tied together, both systems can come out of reset together, and
can also be put in reset together by driving both reset pins low. See
for a snapshot of the
voltage regulation and POR functions provided within Concerto’s Analog and Digital Subsystems.
3.9.1
Analog Subsystem's Internal 1.8-V VREG
The internal 1.8-V Voltage Regulator (VREG) generates V
DD18
power from V
DDIO
. The 1.8-V VREG is
enabled by pulling the VREG18EN pin to a low state. When enabled, the 1.8-V VREG provides 1.8 V to
digital logic associated with the analog functions of the Analog Subsystem.
digital logic associated with the analog functions of the Analog Subsystem.
When the internal 1.8-V VREG function is enabled, the 1.8 V power no longer has to be provided
externally; however, a 1.2-µF (10% tolerance) capacitor is required for each V
externally; however, a 1.2-µF (10% tolerance) capacitor is required for each V
DD18
pin to stabilize the
internally generated voltages. These load capacitors are not required if the internal 1.8-V VREG is
disabled, and the 1.8 V is provided from an external supply.
disabled, and the 1.8 V is provided from an external supply.
Note that while removing the need for an external power supply, enabling the internal VREG might affect
the V
the V
DDIO
power consumption.
42
Device Overview
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