Texas Instruments 180 to 100 Pin DIMM Adapter TMDSADAP180TO100 TMDSADAP180TO100 데이터 시트
제품 코드
TMDSADAP180TO100
SPRS825C – OCTOBER 2012 – REVISED FEBRUARY 2014
Table of Contents
1
Device Summary
.........................................
5.1
Absolute Maximum Ratings
.......................
1.1
Features
..............................................
5.2
Handling Ratings
...................................
1.2
Applications
...........................................
5.3
Recommended Operating Conditions
.............
1.3
Description
............................................
5.4
Electrical Characteristics
...........................
1.4
Functional Block Diagram
...........................
6
Electrical Specifications
.............................
2
Revision History
.........................................
6.1
Current Consumption
..............................
3
Device Overview
........................................
6.2
Thermal Design Considerations
...................
3.1
Device Characteristics
................................
6.3
Timing Parameter Symbology
.....................
6.4
Clock Frequencies, Requirements, and
3.2
Memory Maps
.......................................
Characteristics
.....................................
3.3
Master Subsystem
..................................
6.5
Power Sequencing
.................................
3.4
Control Subsystem
..................................
6.6
Flash Timing – Master Subsystem
................
3.5
Analog Subsystem
..................................
6.7
Flash Timing – Control Subsystem
................
3.6
Master Subsystem NMIs
............................
6.8
GPIO Electrical Data and Timing
..................
3.7
Control Subsystem NMIs
............................
6.9
External Interrupt Electrical Data and Timing
......
3.8
Resets
...............................................
7
Peripheral Information and Timings
..............
3.9
Internal Voltage Regulation and Power-On-Reset
Functionality
Functionality
.........................................
7.1
Analog and Shared Peripherals
....................
3.10
Input Clocks and PLLs
..............................
7.2
Master Subsystem Peripherals
....................
3.11
Master Subsystem Clocking
.........................
7.3
Control Subsystem Peripherals
....................
3.12
Control Subsystem Clocking
........................
8
Device and Documentation Support
..............
3.13
Analog Subsystem Clocking
........................
8.1
Device Support
.....................................
3.14
Shared Resources Clocking
........................
8.2
Documentation Support
............................
3.15
Loss of Input Clock (NMI Watchdog Function)
.....
8.3
Related Links
......................................
3.16
GPIOs and Other Pins
..............................
8.4
Community Resources
.............................
3.17
Emulation/JTAG
....................................
8.5
Trademarks
........................................
3.18
Code Security Module
...............................
8.6
Electrostatic Discharge Caution
...................
3.19
µCRC Module
.......................................
8.7
Glossary
............................................
4
Terminal Description
..................................
9
Mechanical Packaging and Orderable
Information
Information
.............................................
4.1
Terminal Assignments
..............................
9.1
Thermal Data for ZWT Package
...................
4.2
Terminal Functions
..................................
9.2
Packaging Information
.............................
5
Device Operating Conditions
.......................
4
Table of Contents
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