Texas Instruments THS7347EVM Evaluation Module THS7347EVM THS7347EVM 데이터 시트
제품 코드
THS7347EVM
SLOS531B
–
MAY 2007
–
REVISED OCTOBER 2011
THS7347 Read Phase 2:
Step 7
0
I
2
C Start (Master)
S
Step 8
7
6
5
4
3
2
1
0
I
2
C General Address (Master)
0
1
0
1
1
X
X
1
Where each X Logic state is defined by I
2
C-A1 and I
2
C-A0 pins being tied to either V
DD
or GND.
Step 9
9
I
2
C Acknowledge (Slave)
A
Step 10
7
6
5
4
3
2
1
0
I
2
C Read Data (Slave)
Data
Data
Data
Data
Data
Data
Data
Data
Where Data is determined by the logic values contained in the Channel Register.
Step 11
9
I
2
C Not-Acknowledge (Master)
A
Step 12
0
I
2
C Stop (Master)
P
24
Copyright
©
2007
–
2011, Texas Instruments Incorporated