Texas Instruments TLV70130 Low-Dropout Regulator Evaluation Module TLV70130EVM-077 TLV70130EVM-077 데이터 시트
제품 코드
TLV70130EVM-077
Thermal Guidelines and Layout Recommendations
Table 1. Thermal Dissipation Rating
T
A
≤
25
°
C
(T
A
= 85
°
C)
T
A
= 70
°
C Power
Board
Package
R
θ
JA
Power
Power
Rating
Rating
Rating
High-K
(1)
DBV
213.1
°
C/W
470 mW
258 mW
188 mW
(1)
The JEDEC High-K (2s2p) board design used to derive this data was 3-inch
×
3-inch, multilayer board with 1-ounce internal
power and ground planes and 2-ounce copper traces on top and bottom of the board.
The thermal resistance for the TLV70130EVM-077, R
θ
JA
, is the measured value for this particular layout
scheme. The actual allowable power dissipation on your PCB is a strong function of your layout.
5
SLVU554
–
October 2011
TLV70130EVM-077
Copyright
©
2011, Texas Instruments Incorporated