Texas Instruments AM18x eXperimenter's Kit TMDSEXP1808L TMDSEXP1808L 데이터 시트

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TMDSEXP1808L
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VP_CLKOUTx
(Positive Edge
Clocking)
VP_CLKOUTx
(Negative Edge
Clocking)
VP_DOUTx
1
2
11
12
4
4
3
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
Table 6-117. Switching Characteristics Over Recommended Operating Conditions for Video Data Shown
With Respect to VP_CLKOUT2/3
(1)
(see
)
1.3V, 1.2V
1.1V
1.0V
NO.
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
1
t
c(VKO)
Cycle time, VP_CLKOUT2/3
13.3
20
37
ns
2
t
w(VKOH)
Pulse duration, VP_CLKOUT2/3 high
0.4C
0.4C
0.4C
ns
3
t
w(VKOL)
Pulse duration, VP_CLKOUT2/3 low
0.4C
0.4C
0.4C
ns
4
t
t(VKO)
Transition time, VP_CLKOUT2/3
5
5
5
ns
Delay time,
11
t
d(VKOH-VPDOUTV)
8.5
12
17
ns
VP_CLKOUT2/3 high to VP_DOUTx valid
Delay time,
12
t
d(VCLKOH-VPDOUTIV)
1.5
1.5
1.5
ns
VP_CLKOUT2/3 high to VP_DOUTx invalid
(1)
C = VP_CLKO2/3 period in ns.
Figure 6-75. VPIF Channels 2/3 Video Display Data Output Timing With Respect to VP_CLKOUT2/3
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