Texas Instruments AM18x eXperimenter's Kit TMDSEXP1808L TMDSEXP1808L 데이터 시트

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TMDSEXP1808L

AM1808

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SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014

Table 6-135. Programmable Real-Time Unit Subsystem Interrupt Controller (PRUSS INTC)

Registers (continued)

BYTE ADDRESS

ACRONYM

REGISTER DESCRIPTION

0x01C3 4080

GLBLPRIIDX

Global Prioritized Index Register

0x01C3 4200

STATSETINT0

System Interrupt Status Raw/Set Register 0

0x01C3 4204

STATSETINT1

System Interrupt Status Raw/Set Register 1

0x01C3 4280

STATCLRINT0

System Interrupt Status Enabled/Clear Register 0

0x01C3 4284

STATCLRINT1

System Interrupt Status Enabled/Clear Register 1

0x01C3 4300

ENABLESET0

System Interrupt Enable Set Register 0

0x01C3 4304

ENABLESET1

System Interrupt Enable Set Register 1

0x01C3 4380

ENABLECLR0

System Interrupt Enable Clear Register 0

0x01C3 4384

ENABLECLR1

System Interrupt Enable Clear Register 1

0x01C3 4400 - 0x01C3 4440

CHANMAP0 - CHANMAP15

Channel Map Registers 0-15

0x01C3 4800 - 0x01C3 4808

HOSTMAP0 - HOSTMAP2

Host Map Register 0-2

HOSTINTPRIIDX0 -

0x01C3 4900 - 0x01C3 4928

Host Interrupt Prioritized Index Registers 0-9

HOSTINTPRIIDX9

0x01C3 4D00

POLARITY0

System Interrupt Polarity Register 0

0x01C3 4D04

POLARITY1

System Interrupt Polarity Register 1

0x01C3 4D80

TYPE0

System Interrupt Type Register 0

0x01C3 4D84

TYPE1

System Interrupt Type Register 1

HOSTINTNSTLVL0-

0x01C3 5100 - 0x01C3 5128

Host Interrupt Nesting Level Registers 0-9

HOSTINTNSTLVL9

0x01C3 5500

HOSTINTEN

Host Interrupt Enable Register

Peripheral Information and Electrical Specifications

247

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