Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T 데이터 시트
제품 코드
TMDXEVM6467T
SPRS605C – JULY 2009 – REVISED JUNE 2012
Table 7-68. EMAC Statistics Registers (continued)
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
0x01C8 0244
TXDEFERRED
Deferred transmit frames register
0x01C8 0248
TXCOLLISION
Transmit collision frames register
0x01C8 024C
TXSINGLECOLL
Transmit single collision frames register
0x01C8 0250
TXMULTICOLL
Transmit multiple collision frames register
0x01C8 0254
TXEXCESSIVECOLL
Transmit excessive collision frames register
0x01C8 0258
TXLATECOLL
Transmit late collision frames register
0x01C8 025C
TXUNDERRUN
Transmit underrun error register
0x01C8 0260
TXCARRIERSENSE
Transmit carrier sense errors register
0x01C8 0264
TXOCTETS
Transmit octet frames register
0x01C8 0268
FRAME64
Transmit and receive 64 octet frames register
0x01C8 026C
FRAME65T127
Transmit and receive 65 to 127 octet frames register
0x01C8 0270
FRAME128T255
Transmit and receive 128 to 255 octet frames register
0x01C8 0274
FRAME256T511
Transmit and receive 256 to 511 octet frames register
0x01C8 0278
FRAME512T1023
Transmit and receive 512 to 1023 octet frames register
0x01C8 027C
FRAME1024TUP
Transmit and receive 1024 to 1518 octet frames register
0x01C8 0280
NETOCTETS
Network octet frames register
0x01C8 0284
RXSOFOVERRUNS
Receive FIFO or DMA start of frame overruns register
0x01C8 0288
RXMOFOVERRUNS
Receive FIFO or DMA middle of frame overruns register
0x01C8 028C
RXDMAOVERRUNS
Receive DMA start of frame and middle of frame overruns register
0x01C8 0290 - 0x01C8 02FF
–
Reserved
Table 7-69. EMAC Control Module Registers
HEX ADDRESS RANGE
ACRONYM
REGISTER NAME
0x01C8 1000
CMIDVER
Identification and version register
0x01C8 1004
CMSOFTRESET
Software reset register
0x01C8 1008
CMEMCONTROL
Emulation control register
0x01C8 100C
CMINTCTRL
Interrupt control register
0x01C8 1010
CMRXTHRESHINTEN
Receive threshold interrupt enable register
0x01C8 1014
CMRXINTEN
Receive interrupt enable register
0x01C8 1018
CMTXINTEN
Transmit interrupt enable register
0x01C8 101C
CMMISCINTEN
Miscellaneous interrupt enable register
0x01C8 1020 - 0x01C8 103F
–
Reserved
0x01C8 1040
CMRXTHRESHINTSTAT
Receive threshold interrupt status register
0x01C8 1044
CMRXINTSTAT
Receive interrupt status register
0x01C8 1048
CMTXINTSTAT
Transmit interrupt status register
0x01C8 104C
CMMISCINTSTAT
Miscellaneous interrupt status register
0x01C8 1050 - 0x01C8 106F
–
Reserved
0x01C8 1070
CMRXINTMAX
Receive interrupts per millisecond register
0x01C8 1074
CMTXINTMAX
Transmit interrupts per millisecond register
0x01C8 1078 - 0x01C8 10FF
–
Reserved
0x01C8 1100 - 0x01C8 1FFF
–
Reserved
Table 7-70. EMAC Descriptor Memory
HEX ADDRESS RANGE
ACRONYM
DESCRIPTION
0x01C8 2000 - 0x01C8 3FFF
–
EMAC Control Module Descriptor Memory
254
Peripheral Information and Electrical Specifications
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