Texas Instruments CC2650DK 사용자 설명서
µDMA Registers
12.5.1 UDMA Registers
lists the memory-mapped registers for the UDMA. All register offset addresses not listed in
should be considered as reserved locations and the register contents should not be modified.
Table 12-7. UDMA Registers
Offset
Acronym
Register Name
Section
0h
STATUS
Status
4h
CFG
Configuration
8h
CTRL
Channel Control Data Base Pointer
Ch
ALTCTRL
Channel Alternate Control Data Base Pointer
10h
WAITONREQ
Channel Wait On Request Status
14h
SOFTREQ
Channel Software Request
18h
SETBURST
Channel Set UseBurst
1Ch
CLEARBURST
Channel Clear UseBurst
20h
SETREQMASK
Channel Set Request Mask
24h
CLEARREQMASK
Clear Channel Request Mask
28h
SETCHANNELEN
Set Channel Enable
2Ch
CLEARCHANNELEN
Clear Channel Enable
30h
SETCHNLPRIALT
Channel Set Primary-Alternate
34h
CLEARCHNLPRIALT
Channel Clear Primary-Alternate
38h
SETCHNLPRIORITY
Set Channel Priority
3Ch
CLEARCHNLPRIORITY
Clear Channel Priority
4Ch
ERROR
Error Status and Clear
504h
REQDONE
Channel Request Done
520h
DONEMASK
Channel Request Done Mask
1053
SWCU117A – February 2015 – Revised March 2015
Micro Direct Memory Access (µDMA)
Copyright © 2015, Texas Instruments Incorporated