Texas Instruments CC2650DK 사용자 설명서
General-Purpose Timer Registers
13.5.1.4 CTL Register (Offset = Ch) [reset = X]
CTL is shown in
and described in
Control
Figure 13-12. CTL Register
31
30
29
28
27
26
25
24
RESERVED
R-X
23
22
21
20
19
18
17
16
RESERVED
R-X
15
14
13
12
11
10
9
8
RESERVED
TBPWML
TBOTE
RESERVED
TBEVENT
TBSTALL
TBEN
R-X
R/W-X
R/W-X
R-X
R/W-X
R/W-X
R/W-X
7
6
5
4
3
2
1
0
RESERVED
TAPWML
TAOTE
RTCEN
TAEVENT
TASTALL
TAEN
R-X
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
Table 13-11. CTL Register Field Descriptions
Bit
Field
Type
Reset
Description
31-15
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
14
TBPWML
R/W
X
GPT Timer B PWM Output Level 0: Output is unaffected. 1: Output
is inverted.
is inverted.
0h = Not inverted
1h = Inverted
13
TBOTE
R/W
X
GPT Timer B Output Trigger Enable
0h = The output Timer B ADC trigger is disabled.
1h = The output Timer B ADC trigger is enabled.
12
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
11-10
TBEVENT
R/W
X
GPT Timer B Event Mode
0h = Positive edge
1h = Negative edge
3h = Both edges
9
TBSTALL
R/W
X
GPT Timer B Stall Enable
0h = Timer B continues counting while the processor is halted by the
debugger.
debugger.
1h = Timer B freezes counting while the processor is halted by the
debugger.
debugger.
8
TBEN
R/W
X
GPT Timer B Enable
0h = Timer B is disabled.
1h = Timer B is enabled and begins counting or the capture logic is
enabled based on CFG register.
enabled based on CFG register.
7
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
6
TAPWML
R/W
X
GPT Timer A PWM Output Level
0h = Not inverted
1h = Inverted
5
TAOTE
R/W
X
GPT Timer A Output Trigger Enable
0h = The output Timer A ADC trigger is disabled.
1h = The output Timer A ADC trigger is enabled.
1093
SWCU117A – February 2015 – Revised March 2015
Timers
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