Texas Instruments CC2650DK 사용자 설명서
Cortex-M3 Processor Registers
2.7.4.2
ACTLR Register (Offset = 8h) [reset = X]
ACTLR is shown in
and described in
.
Auxiliary Control This register is used to disable certain aspects of functionality within the processor
Figure 2-72. ACTLR Register
31
30
29
28
27
26
25
24
RESERVED
R/W-X
23
22
21
20
19
18
17
16
RESERVED
R/W-X
15
14
13
12
11
10
9
8
RESERVED
R/W-X
7
6
5
4
3
2
1
0
RESERVED
DISFOLD
DISDEFWBUF
DISMCYCINT
R/W-X
R/W-X
R/W-X
R/W-X
Table 2-98. ACTLR Register Field Descriptions
Bit
Field
Type
Reset
Description
31-3
RESERVED
R/W
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
2
DISFOLD
R/W
X
Disables folding of IT instruction.
1
DISDEFWBUF
R/W
X
Disables write buffer use during default memory map accesses. This
causes all bus faults to be precise bus faults but decreases the
performance of the processor because the stores to memory have to
complete before the next instruction can be executed.
causes all bus faults to be precise bus faults but decreases the
performance of the processor because the stores to memory have to
complete before the next instruction can be executed.
0
DISMCYCINT
R/W
X
Disables interruption of multi-cycle instructions. This increases the
interrupt latency of the processor becuase LDM/STM completes
before interrupt stacking occurs.
interrupt latency of the processor becuase LDM/STM completes
before interrupt stacking occurs.
132
SWCU117A – February 2015 – Revised March 2015
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