Texas Instruments CC2650DK 사용자 설명서
Cortex-M3 Processor Registers
2.7.4.44 ID_DFR0 Register (Offset = D48h) [reset = X]
ID_DFR0 is shown in
and described in
.
Debug Feature 0 This register provides a high level view of the debug system. Further details are provided
in the debug infrastructure itself.
in the debug infrastructure itself.
Figure 2-114. ID_DFR0 Register
31
30
29
28
27
26
25
24
RESERVED
R-X
23
22
21
20
19
18
17
16
MICROCONTROLLER_DEBUG_MODEL
RESERVED
R-1h
R-X
15
14
13
12
11
10
9
8
RESERVED
R-X
7
6
5
4
3
2
1
0
RESERVED
R-X
Table 2-140. ID_DFR0 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-24
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
23-20
MICROCONTROLLER_D
R
1h
Microcontroller Debug Model - memory mapped 0x0: Not supported
EBUG_MODEL
0x1: Microcontroller debug v1 (ITMv1 and DWTv1)
19-0
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
187
SWCU117A – February 2015 – Revised March 2015
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