Texas Instruments CC2650DK 사용자 설명서
PRCM Registers
6.2.4.1
CTL0 Register (Offset = 0h) [reset = X]
CTL0 is shown in
and described in
Control 0 Controls various clock source selects
Figure 6-81. CTL0 Register
31
30
29
28
27
26
25
24
XTAL_IS_24M
RESERVED
BYPASS_XOS
BYPASS_RCO
DOUBLER_START_DURATION
DOUBLER_RE
RESERVED
C_LF_CLK_QU SC_LF_CLK_Q
SET_DURATIO
AL
UAL
N
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
23
22
21
20
19
18
17
16
RESERVED
FORCE_KICKS
RESERVED
ALLOW_SCLK
TART_EN
_HF_SWITCHI
NG
R/W-X
R/W-X
R/W-X
R/W-X
15
14
13
12
11
10
9
8
RESERVED
RCOSC_LF_T
XOSC_HF_PO
XOSC_LF_DIG CLK_LOSS_EN
ACLK_TDC_S
RIMMED
WER_MODE
_BYPASS
RC_SEL
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
7
6
5
4
3
2
1
0
ACLK_TDC_S
ACLK_REF_SRC_SEL
SPARE4
SCLK_LF_SRC_SEL
SCLK_MF_SR
SCLK_HF_SR
RC_SEL
C_SEL
C_SEL
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
R/W-X
Table 6-86. CTL0 Register Field Descriptions
Bit
Field
Type
Reset
Description
31
XTAL_IS_24M
R/W
X
Set based on the accurate high frequency XTAL.
0h = 48M : Internal. Only to be used through TI provided API.
1h = 24M : Internal. Only to be used through TI provided API.
30
RESERVED
R/W
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
29
BYPASS_XOSC_LF_CLK
R/W
X
Internal. Only to be used through TI provided API.
_QUAL
28
BYPASS_RCOSC_LF_CL R/W
X
Internal. Only to be used through TI provided API.
K_QUAL
27-26
DOUBLER_START_DUR
R/W
X
Internal. Only to be used through TI provided API.
ATION
25
DOUBLER_RESET_DUR
R/W
X
Internal. Only to be used through TI provided API.
ATION
24-23
RESERVED
R/W
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
22
FORCE_KICKSTART_EN
R/W
X
Internal. Only to be used through TI provided API.
21-17
RESERVED
R/W
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
16
ALLOW_SCLK_HF_SWIT
R/W
X
0: Default - Switching of HF clock source is disabled . 1: Allows
CHING
swtiching of sclk_hf source. Provided to prevent switching of the
SCLK_HF source when running from flash (a long period during
switching could corrupt flash). When sclk_hf switching is disabled, a
new source can be started when SCLK_HF_SRC_SEL is changed,
but the switch will not occur until this bit is set. This bit should be set
to enable clock switching after
STAT0.PENDINGSCLKHFSWITCHING indicates the new HF clock
is ready. When switching completes (also indicated by
STAT0.PENDINGSCLKHFSWITCHING) sclk_hf switching should be
disabled to prevent flash corruption. Switching should not be enabled
when running from flash.
SCLK_HF source when running from flash (a long period during
switching could corrupt flash). When sclk_hf switching is disabled, a
new source can be started when SCLK_HF_SRC_SEL is changed,
but the switch will not occur until this bit is set. This bit should be set
to enable clock switching after
STAT0.PENDINGSCLKHFSWITCHING indicates the new HF clock
is ready. When switching completes (also indicated by
STAT0.PENDINGSCLKHFSWITCHING) sclk_hf switching should be
disabled to prevent flash corruption. Switching should not be enabled
when running from flash.
510
Power, Reset, and Clock Management
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated