Texas Instruments CC2650DK 사용자 설명서
Cryptography Registers
10.2.1.3 DMACH0LEN Register (Offset = Ch) [reset = X]
DMACH0LEN is shown in
and described in
DMA Channel 0 Length
Figure 10-5. DMACH0LEN Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
LEN
R/W-X
R/W-X
Table 10-13. DMACH0LEN Register Field Descriptions
Bit
Field
Type
Reset
Description
31-16
RESERVED
R/W
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
15-0
LEN
R/W
X
DMA transfer length in bytes. During configuration, this register
contains the DMA transfer length in bytes. During operation, it
contains the last updated value of the DMA transfer length after
being sent to the master interface. Note: Writing a non-zero value to
this register field starts the transfer if the channel is enabled by
setting DMACH0CTL.EN.
contains the DMA transfer length in bytes. During operation, it
contains the last updated value of the DMA transfer length after
being sent to the master interface. Note: Writing a non-zero value to
this register field starts the transfer if the channel is enabled by
setting DMACH0CTL.EN.
826
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated