Texas Instruments 125 MHz Quad M-LVDS Transceiver Evaluation Board DS91M040EVK/NOPB DS91M040EVK/NOPB 데이터 시트
제품 코드
DS91M040EVK/NOPB
April 14, 2008
Rev. 1.0
© 2008, National Semiconductor Corp.
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The block diagram of Figure 2 details a clock distribution network in an ATCA backplane. The clock busses
have 130-ohm differential impedance and are doubly terminated with 80 ohms at either end of the backplane.
The parallel combination of 80-ohm resistors means that the MLVDS devices will be driving a 40-ohm load
termination. The maximum stub length from the backplane is defined in the ATCA standard as 1 inch or 2.54
cm.
have 130-ohm differential impedance and are doubly terminated with 80 ohms at either end of the backplane.
The parallel combination of 80-ohm resistors means that the MLVDS devices will be driving a 40-ohm load
termination. The maximum stub length from the backplane is defined in the ATCA standard as 1 inch or 2.54
cm.
Figure 3 shows a picture of a 14-slot ATCA backplane fully populated with DS91M040 evaluation boards.
Figure 3 - DS91M040 Evaluation Boards in an ATCA Backplane