Texas Instruments LM3668SD-3034 Evaluation Board LM3668SD-3034EV/NOPB LM3668SD-3034EV/NOPB 데이터 시트
제품 코드
LM3668SD-3034EV/NOPB
Operating Information
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Operating Information
The LM3668 evaluation board is set for the following default positions:
•
V
OUT
= 3.3 V, for V
OUT
= 2.8 V move VSEL pin to Low via jumper
•
SYNC mode = H (PWM mode), for auto mode, set SYNC = low (move jumper to inner position). Do not
leave this pin floating.
leave this pin floating.
•
EN pin is tied to V
IN
via a jumper
•
It is not recommended to start up the device with full load at minimum input voltage
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Evaluation Board Layout
LM3668EVB is a four-layer board designed to maximize the performance. Top layer consists of high
current path; bottom layer is for low current and logic signals path. Inner layer 1 and layer 2 are dedicated
for PGND (power GND) and SGND (analog and logic GND). For optimum performance, it is
recommended to separate the PGND and SGND pins and join them together at the "star GND" on the
PCB. The star GND traces on the PCB board should be close to the device power GND pin.
current path; bottom layer is for low current and logic signals path. Inner layer 1 and layer 2 are dedicated
for PGND (power GND) and SGND (analog and logic GND). For optimum performance, it is
recommended to separate the PGND and SGND pins and join them together at the "star GND" on the
PCB. The star GND traces on the PCB board should be close to the device power GND pin.
Figure 2. Top Layer
Figure 3. GND Inner Layer 1
Figure 4. SGND Inner Layer 2
Figure 5. Bottom Layer
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SNVA236F – June 2007 – Revised April 2013
AN-1623 LM3668 Evaluation Board
Copyright © 2007–2013, Texas Instruments Incorporated