Texas Instruments DP130 Single-Source Evaluation Module DP130SSEVM DP130SSEVM 데이터 시트

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OUTxp
OUTxn
50%
t
OUTxp(f)
OUTyp
OUTyn
t
sk2
t
OUTxn(r)
t
OUTxn(f)
t
OUTxp(r)
t
sk1
= 0.5 x | (t
OUTxp(r)
-t
OUTxn(f)
) + (t
OUTxp(f)
-t
OUTxn(r)
) |
SLLSE57D – APRIL 2011 – REVISED JULY 2013
Figure 9. Main Link Skew Measurements
HPD/CAD ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
HPD_SRC, CAD_SRC
V
OH
High-level output voltage
I
OH
= 500µA
2.7
3.6
V
V
OL
Low-level output voltage
I
OH
= 500µA
0
0.1
V
R
outCAD
CAD series output resistance
(1)
EN=RSTN=V
CC
; HPD_SNK=CAD_SNK=V
CC
150
Ω
R
outHPD
HPD series output resistance
EN=RSTN=V
CC
; HPD_SNK=CAD_SNK=V
CC
150
Ω
V
CC
= 0V, V(pin) = 1.2V; RSTN
20
V
CC
= 0V, V(pin) = 3.3V; SCL/SDA_CTL,
20
AUX_SNKp/n
I
LEAK
Leakage current
(2)
μA
V
CC
= 0V, V(pin) = 3.3V; HPD_SNK
40
V
CC
= 0V, V(pin) = 3.3V; AUX_SRCp/n
60
HPD_SNK
V
IH
= 1.9V (leakage includes the 130k
Ω pull-down
I
H
High-level input current
–30
30
µA
resistor)
V
IL
= 0.8V (leakage includes the 130k
Ω pull-down
I
L
Low-level input current
–30
30
µA
resistor)
V
TH+
Positive going input threshold voltage
1.4
V
R
pdHPD
HPD input termination to GND
V
CC
=0V
100
130
160
k
Ω
CAD_SNK
I
H
High-level input current
V
IH
= 1.9V
–1
1
µA
I
L
Low-level input current
V
IL
= 0.8V
–1
1
µA
V
TH+
Positive going input threshold voltage
1.4
V
(1)
A series output resistance of 100k
Ω may be added in series to the CAD_SRC output to mimic a cable adapter.
(2)
Applies to failsafe inputs: RSTN, SDA_CTL, SCL_CTL, SDA_DDC, SCL_DDC, AUX_SNK P/N, AUX_SRC P/N, HPD_SNK
HPD/CAD SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
PD(HPD)
Propagation delay HPD_SNK to HPD_SRC
50
ns
V
CC
= 3.0V; See
t
PD(CAD)
Propagation delay CAD_SNK to CAD_SRC
50
ns
t
T(HPD)
HPD logic shut off time
V
CC
= 3.0V; See
400
ms
14
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