Texas Instruments 6-channel Power Mgmt IC with 3DC/DCs, 3 LDOs, I2C Interface and DVS Evaluation Module BoardEvaluatio T TPS65023EVM-205 데이터 시트
제품 코드
TPS65023EVM-205
www.ti.com
Setup
J7 – Fault Outputs
Four fault outputs are available on this connector:
PWRFAIL– Fault occurs when input voltage is less than 3 V. Pulled up to VRTC when safe; low
for fail.
for fail.
INT– Fault occurs when there is a fail on an input or output voltage; acts as a sum fail. Pulled up
to VIN when safe; low for fail.
to VIN when safe; low for fail.
RESPWRON– Low reset signal controlled by SW1, 144 ms. Pulled up to VIN normally.
LOWBAT– Fault occurs when input voltage is less than 3.6 V. Pulled up to VIN when safe; low
for fail.
for fail.
J8 – USB
This header duplicates the signals from the J20 interface connector.
J9 – VDCDC1
Output from DCDC1 switching regulator maximum output current 1.2 A; default voltage setting is
3.3 V.
3.3 V.
J10 – GND
Return for VDCDC1.
J11 – VDCDC2
Output from DCDC2 switching regulator; maximum output current 1 A, default voltage setting is
2.5 V.
2.5 V.
J12 – GND
Return for VDCDC2
J13 – VLDO1
Output from low dropout regulator VLDO1; maximum output current 200 mA, default value 1.1 V.
J14 – GND
Return for VLDO1
J15 – VLDO2
Output from low dropout regulator VLDO2; maximum output current 200 mA, default value 1.3 V.
J16 – GND
Return for VLDO2.
J17 – VDCDC3
Output from switching regulator DCDC3; maximum output current 800 mA, default value 1.55 V.
J18– GND
Return for VDCDC3.
J19 – USB
USB interface connector..
JP1 – DEF1
Sets default voltage for DCDC1, 1.2 V or 1.6 V.
JP2 – DEF2
Sets default voltage for DCDC2, 3.3 V or 1.8 V.
JP3 – DEF3
Sets default voltage for DCDC3, 3.3 V or 1.8 V.
SLVU193 – December 2006
TPS65023EVM
3