Texas Instruments SMA breakout daughterboard for TLK10034 TLK10034SMAEVM TLK10034SMAEVM 데이터 시트
제품 코드
TLK10034SMAEVM
EVM PCB and High-Speed Design Considerations
2
EVM PCB and High-Speed Design Considerations
Use the EVM for the evaluation of device parameters as well as a guide for high-speed board layout. As
the frequency of operation increases, take special care to ensure that the highest signal integrity is
maintained. This is achieved by controlling the board's impedance to 50-
the frequency of operation increases, take special care to ensure that the highest signal integrity is
maintained. This is achieved by controlling the board's impedance to 50-
Ω
single-ended or 100-
Ω
differential impedance for both the low- and high-speed differential serial and clock connections. Vias are
minimized and, when necessary, are designed to minimize impedance discontinuities along the
transmission line. Care was taken to control trace length mismatch (board skew) to less than ±0.5 mil.
minimized and, when necessary, are designed to minimize impedance discontinuities along the
transmission line. Care was taken to control trace length mismatch (board skew) to less than ±0.5 mil.
Overall, the board layout is designed and optimized for high-speed operation. Thus, understanding
impedance control and transmission line effects are crucial when designing high-speed boards. Some of
the advanced features offered by this board include:
impedance control and transmission line effects are crucial when designing high-speed boards. Some of
the advanced features offered by this board include:
•
TLK10034 printed-circuit board (PCB) is designed for optimal high-speed signal integrity using Rogers
Material for the outer signal layers and FR-4 for the inner layers. All gigabit and clock signals are
routed over the Rogers Material for minimal signal loss. The FPGA and SMA Breakout Daughterboards
use FR-4 for all layers.
Material for the outer signal layers and FR-4 for the inner layers. All gigabit and clock signals are
routed over the Rogers Material for minimal signal loss. The FPGA and SMA Breakout Daughterboards
use FR-4 for all layers.
•
SMA and header fixtures are easily connected to test equipment.
•
All I/O signals are accessible for rapid prototyping.
•
On-board capacitors provide ac coupling of differential transmit and receive signals. Zero-
Ω
resistors
placed on the transmit pins allow external loopback tests and only a single ac coupling capacitor on the
RX pins is located in between the TX and RX signals. If the TX signals need to be evaluated on their
own, the 0-
RX pins is located in between the TX and RX signals. If the TX signals need to be evaluated on their
own, the 0-
Ω
resistors can be replaced with 0.1-µF capacitors.
•
The high-speed signals of channels A and B are routed to SFP+ modules for easy evaluation in
systems that implement optical fiber configurations. The high-speed signals of channels C and D are
routed to edge launch SMA connectors for easy evaluation in systems that use standard test
equipment.
systems that implement optical fiber configurations. The high-speed signals of channels C and D are
routed to edge launch SMA connectors for easy evaluation in systems that use standard test
equipment.
•
The low-speed signals of all four channels are routed to Samtec SEAM/SEAF board-to-board
connectors allowing for smaller EVM PCB size and additional options for evaluation of these signals.
An SMA breakout board is optionally supplied that allows for access to these low-speed signals. SMA
cables can be connected from the input to the output signals creating an external loopback situation, or
to standard lab test equipment. The pinout is compatible with the TLK10002 EVM FPGA
Daughterboard and any variety of custom-interface boards could be created for use with the EVM
motherboard.
connectors allowing for smaller EVM PCB size and additional options for evaluation of these signals.
An SMA breakout board is optionally supplied that allows for access to these low-speed signals. SMA
cables can be connected from the input to the output signals creating an external loopback situation, or
to standard lab test equipment. The pinout is compatible with the TLK10002 EVM FPGA
Daughterboard and any variety of custom-interface boards could be created for use with the EVM
motherboard.
•
The MDIO data signals are routed to the TLK10034 and the bus continues to a 0.10-inch header
allowing multiple boards to be daisy chained on a single MDIO Bus.
allowing multiple boards to be daisy chained on a single MDIO Bus.
•
This board can operate in standalone mode using an external MDIO data controller and the hardware
control pin settings or through the USB Dongle interface. The use of the USB Dongle is recommended
and is the preferred mode of operation. All control pins of the TLK10034 device have also been
connected to TI’s TCA6424 I
control pin settings or through the USB Dongle interface. The use of the USB Dongle is recommended
and is the preferred mode of operation. All control pins of the TLK10034 device have also been
connected to TI’s TCA6424 I
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C-to-GPIO device. When using the supplied EVM GUI and USB
Interface, these control pins must be set to high voltage (logic 1) in hardware and controlled through
the GUI interface, allowing the TCA6424 to pull the signals low when needed.
the GUI interface, allowing the TCA6424 to pull the signals low when needed.
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TLK10034 EVM Kit Contents
The TLK10034 EVM kit contains the following:
•
TLK10034 EVM motherboard
•
TLK10034 EVM USB Dongle board
•
TLK10034 EVM voltage monitor board
•
TLK10034 EVM SMA breakout board (optional)
•
TLK10034 EVM User’s Guide (this document)
•
Banana jack power adapter cables
•
USB cable
•
CD-ROM containing user interface software
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SLLU168 – August 2012
TLK10034 Quad-Channel XAUI/10GBASE-KR Transceiver Evaluation
Module (EVM)
Copyright © 2012, Texas Instruments Incorporated