Texas Instruments Evaluation Module for TPS54519 Synchronous Step-Down Converter TPS54519EVM-037 TPS54519EVM-037 데이터 시트
제품 코드
TPS54519EVM-037
EN = 2 V / div
Time = 2 msec / div
V
= 1 V / div
OUT
PWRGD = 5 V / div
V = 5 V / div
IN
EN = 2 V / div
Time = 100 µsec / div
V
= 1 V / div
OUT
PWRGD = 5 V / div
V = 5 V / div
IN
Test Setup and Results
2.10 Powering Down
and
show the start-up waveforms for the TPS54519EVM-037. In
, the output
voltage ramps down as soon as the input voltage falls below the UVLO stop threshold as set by the R1
and R2 resistor divider network. In
and R2 resistor divider network. In
, the output is inhibited by using a jumper at JP1 to tie EN to
GND. The input voltage for these plots is 5 V and the load is 1
Ω
.
Figure 11. TPS54519EVM-037 Shutdown Relative to V
IN
Figure 12. TPS54519EVM-037 Shutdown Relative to EN
10
TPS54519EVM-037, 5-A, SWIFT
™
Regulator
—
Evaluation Module
SLVU523
–
September 2011
Copyright
©
2011, Texas Instruments Incorporated