Texas Instruments TAS5624A and TAS5622A Evaluation Module TAS5624ADDVEVM TAS5624ADDVEVM 데이터 시트
제품 코드
TAS5624ADDVEVM
GND
PVDD
(+12 to
+36 Vdc)
+ LEFT SPEAKER OUTPUTS –
+ RIGHT SPEAKER OUTPUTS –
HEATSINK
LEFT CHANNEL
OUTPUT FILTERS
RIGHT CHANNEL
OUTPUT FILTERS
INPUT SIGNAL & CONTROL
INTERFACE (J1)
TAS5538
TAS5622
TAS5624
MODE
PINS
PINS
S1
+
3
.3
V
d
c
R
E
G
U
L
A
T
O
R
Reset
LED
STATUS
LEDs
RESET
NORMAL
PBTL – BTL
T
AS5622DDVEVM 6524656
T
AS5624DDVEVM 6524657
Quick Setup Guide
2.5
Output Configuration BTL and PBTL
When changing mode from BTL to PBTL, make sure that the AMP_RESET switch is set to RESET before
changing shunts on Mode headers M3, D and C.
changing shunts on Mode headers M3, D and C.
- For BTL mode place a shunt on pins 1 and 2 of each header, at the positions marked BTL.
- For PBTL mode place a shunt on pins 3 and 2 of each header, at the positions marked PBTL.
- For PBTL mode place a shunt on pins 3 and 2 of each header, at the positions marked PBTL.
In PBTL mode the load must be connected according to
Figure 5. PBTL Mode Configuration
8
TAS5622-TAS5624DDVEVM
SLAU376 – May 2012
Copyright © 2012, Texas Instruments Incorporated